Home
last modified time | relevance | path

Searched refs:EPDC_UPD_CTRL_DRY_RUN_MASK (Results 1 – 8 of 8) sorted by relevance

/hal_nxp-latest/imx/devices/MCIMX7D/
DMCIMX7D_M4.h15185 #define EPDC_UPD_CTRL_DRY_RUN_MASK 0x2u macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/
DMIMX8UD7_dsp1.h14569 #define EPDC_UPD_CTRL_DRY_RUN_MASK (0x2U) macro
14571 … (((uint32_t)(((uint32_t)(x)) << EPDC_UPD_CTRL_DRY_RUN_SHIFT)) & EPDC_UPD_CTRL_DRY_RUN_MASK)
DMIMX8UD7_dsp0.h14615 #define EPDC_UPD_CTRL_DRY_RUN_MASK (0x2U) macro
14617 … (((uint32_t)(((uint32_t)(x)) << EPDC_UPD_CTRL_DRY_RUN_SHIFT)) & EPDC_UPD_CTRL_DRY_RUN_MASK)
DMIMX8UD7_cm33.h15210 #define EPDC_UPD_CTRL_DRY_RUN_MASK (0x2U) macro
15212 … (((uint32_t)(((uint32_t)(x)) << EPDC_UPD_CTRL_DRY_RUN_SHIFT)) & EPDC_UPD_CTRL_DRY_RUN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/
DMIMX8UD3_cm33.h15210 #define EPDC_UPD_CTRL_DRY_RUN_MASK (0x2U) macro
15212 … (((uint32_t)(((uint32_t)(x)) << EPDC_UPD_CTRL_DRY_RUN_SHIFT)) & EPDC_UPD_CTRL_DRY_RUN_MASK)
DMIMX8UD3_dsp0.h14615 #define EPDC_UPD_CTRL_DRY_RUN_MASK (0x2U) macro
14617 … (((uint32_t)(((uint32_t)(x)) << EPDC_UPD_CTRL_DRY_RUN_SHIFT)) & EPDC_UPD_CTRL_DRY_RUN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/
DMIMX8US3_dsp0.h14615 #define EPDC_UPD_CTRL_DRY_RUN_MASK (0x2U) macro
14617 … (((uint32_t)(((uint32_t)(x)) << EPDC_UPD_CTRL_DRY_RUN_SHIFT)) & EPDC_UPD_CTRL_DRY_RUN_MASK)
DMIMX8US3_cm33.h15210 #define EPDC_UPD_CTRL_DRY_RUN_MASK (0x2U) macro
15212 … (((uint32_t)(((uint32_t)(x)) << EPDC_UPD_CTRL_DRY_RUN_SHIFT)) & EPDC_UPD_CTRL_DRY_RUN_MASK)