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Searched refs:ENET_TCR_RFC_PAUSE_MASK (Results 1 – 25 of 88) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K148_ENET.h609 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
612 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h10363 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
10367 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h10350 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
10354 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h12608 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
12612 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h11995 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
11999 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h11995 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
11999 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h17159 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
17162 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h17179 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
17182 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h18209 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
18212 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h19280 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
19283 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h18994 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
18997 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h19282 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
19285 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h19648 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
19651 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h25473 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
25477 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h25471 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
25475 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h25471 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
25475 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h25473 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
25477 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h20512 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
20515 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h25473 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
25477 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_cm7.h25471 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
25475 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
DMIMX8MN6_ca53.h25500 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
25504 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h20936 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
20940 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h20434 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
20437 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/
DMIMX8MD7_cm4.h20936 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
20940 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD6/
DMIMX8MD6_cm4.h20936 #define ENET_TCR_RFC_PAUSE_MASK (0x10U) macro
20940 … (((uint32_t)(((uint32_t)(x)) << ENET_TCR_RFC_PAUSE_SHIFT)) & ENET_TCR_RFC_PAUSE_MASK)

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