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Searched refs:ENET_TACC_IPCHK_MASK (Results 1 – 25 of 89) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K148_ENET.h838 #define ENET_TACC_IPCHK_MASK (0x8U) macro
841 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/drivers/enet/
Dfsl_enet.h332 kENET_TxAccelIpCheckEnabled = ENET_TACC_IPCHK_MASK, /*!< Insert IP header checksum. */
/hal_nxp-latest/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h10626 #define ENET_TACC_IPCHK_MASK (0x8U) macro
10633 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h10613 #define ENET_TACC_IPCHK_MASK (0x8U) macro
10620 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h12870 #define ENET_TACC_IPCHK_MASK (0x8U) macro
12877 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h12257 #define ENET_TACC_IPCHK_MASK (0x8U) macro
12264 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h12257 #define ENET_TACC_IPCHK_MASK (0x8U) macro
12264 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h17472 #define ENET_TACC_IPCHK_MASK (0x8U) macro
17479 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h17492 #define ENET_TACC_IPCHK_MASK (0x8U) macro
17499 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h18522 #define ENET_TACC_IPCHK_MASK (0x8U) macro
18529 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h19593 #define ENET_TACC_IPCHK_MASK (0x8U) macro
19600 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h19307 #define ENET_TACC_IPCHK_MASK (0x8U) macro
19314 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h19595 #define ENET_TACC_IPCHK_MASK (0x8U) macro
19602 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h19961 #define ENET_TACC_IPCHK_MASK (0x8U) macro
19968 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h25853 #define ENET_TACC_IPCHK_MASK (0x8U) macro
25860 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h25851 #define ENET_TACC_IPCHK_MASK (0x8U) macro
25858 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h25851 #define ENET_TACC_IPCHK_MASK (0x8U) macro
25858 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h25853 #define ENET_TACC_IPCHK_MASK (0x8U) macro
25860 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h20825 #define ENET_TACC_IPCHK_MASK (0x8U) macro
20832 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h25853 #define ENET_TACC_IPCHK_MASK (0x8U) macro
25860 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_cm7.h25851 #define ENET_TACC_IPCHK_MASK (0x8U) macro
25858 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
DMIMX8MN6_ca53.h25880 #define ENET_TACC_IPCHK_MASK (0x8U) macro
25887 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h21316 #define ENET_TACC_IPCHK_MASK (0x8U) macro
21323 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h20747 #define ENET_TACC_IPCHK_MASK (0x8U) macro
20754 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/
DMIMX8MD7_cm4.h21316 #define ENET_TACC_IPCHK_MASK (0x8U) macro
21323 … (((uint32_t)(((uint32_t)(x)) << ENET_TACC_IPCHK_SHIFT)) & ENET_TACC_IPCHK_MASK)

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