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Searched refs:ENET_RCR_DRT_MASK (Results 1 – 25 of 89) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/cmsis_drivers/enet/
Dfsl_enet_cmsis.c202 rcr |= ENET_RCR_DRT_MASK; in ENET_CommonControl()
206 rcr &= ~ENET_RCR_DRT_MASK; in ENET_CommonControl()
248 rcr &= ~ENET_RCR_DRT_MASK; in ENET_CommonControl()
/hal_nxp-latest/mcux/mcux-sdk/drivers/enet/
Dfsl_enet.c623 rcr |= ENET_RCR_DRT_MASK; in ENET_SetMacController()
630 rcr &= ~ENET_RCR_DRT_MASK; in ENET_SetMacController()
1137 rcr |= ENET_RCR_DRT_MASK; in ENET_SetMII()
1142 rcr &= ~ENET_RCR_DRT_MASK; in ENET_SetMII()
/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K148_ENET.h520 #define ENET_RCR_DRT_MASK (0x2U) macro
523 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h10222 #define ENET_RCR_DRT_MASK (0x2U) macro
10228 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h10235 #define ENET_RCR_DRT_MASK (0x2U) macro
10241 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h12480 #define ENET_RCR_DRT_MASK (0x2U) macro
12486 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h11867 #define ENET_RCR_DRT_MASK (0x2U) macro
11873 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h11867 #define ENET_RCR_DRT_MASK (0x2U) macro
11873 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h17042 #define ENET_RCR_DRT_MASK (0x2U) macro
17048 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h17022 #define ENET_RCR_DRT_MASK (0x2U) macro
17028 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h19143 #define ENET_RCR_DRT_MASK (0x2U) macro
19149 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h18072 #define ENET_RCR_DRT_MASK (0x2U) macro
18078 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h19145 #define ENET_RCR_DRT_MASK (0x2U) macro
19151 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h18857 #define ENET_RCR_DRT_MASK (0x2U) macro
18863 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h19511 #define ENET_RCR_DRT_MASK (0x2U) macro
19517 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h25336 #define ENET_RCR_DRT_MASK (0x2U) macro
25342 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h25334 #define ENET_RCR_DRT_MASK (0x2U) macro
25340 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_cm7.h25334 #define ENET_RCR_DRT_MASK (0x2U) macro
25340 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
DMIMX8MN6_ca53.h25363 #define ENET_RCR_DRT_MASK (0x2U) macro
25369 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h20297 #define ENET_RCR_DRT_MASK (0x2U) macro
20303 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h20375 #define ENET_RCR_DRT_MASK (0x2U) macro
20381 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h25336 #define ENET_RCR_DRT_MASK (0x2U) macro
25342 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h25334 #define ENET_RCR_DRT_MASK (0x2U) macro
25340 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h20799 #define ENET_RCR_DRT_MASK (0x2U) macro
20805 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h25336 #define ENET_RCR_DRT_MASK (0x2U) macro
25342 … (((uint32_t)(((uint32_t)(x)) << ENET_RCR_DRT_SHIFT)) & ENET_RCR_DRT_MASK)

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