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Searched refs:ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK (Results 1 – 11 of 11) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h44898 #define ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK (0x800U) macro
44905 …2_t)(((uint32_t)(x)) << ENET_QOS_MTL_DBG_CTL_FIFOWREN_SHIFT)) & ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK)
DMIMXRT1176_cm4.h44896 #define ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK (0x800U) macro
44903 …2_t)(((uint32_t)(x)) << ENET_QOS_MTL_DBG_CTL_FIFOWREN_SHIFT)) & ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h42095 #define ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK (0x800U) macro
42102 …2_t)(((uint32_t)(x)) << ENET_QOS_MTL_DBG_CTL_FIFOWREN_SHIFT)) & ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h42095 #define ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK (0x800U) macro
42102 …2_t)(((uint32_t)(x)) << ENET_QOS_MTL_DBG_CTL_FIFOWREN_SHIFT)) & ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7.h42095 #define ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK (0x800U) macro
42102 …2_t)(((uint32_t)(x)) << ENET_QOS_MTL_DBG_CTL_FIFOWREN_SHIFT)) & ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9131/
DMIMX9131.h27533 #define ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK (0x800U) macro
27540 …2_t)(((uint32_t)(x)) << ENET_QOS_MTL_DBG_CTL_FIFOWREN_SHIFT)) & ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_dsp.h40404 #define ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK (0x800U) macro
40411 …2_t)(((uint32_t)(x)) << ENET_QOS_MTL_DBG_CTL_FIFOWREN_SHIFT)) & ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK)
DMIMX8ML8_cm7.h42095 #define ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK (0x800U) macro
42102 …2_t)(((uint32_t)(x)) << ENET_QOS_MTL_DBG_CTL_FIFOWREN_SHIFT)) & ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK)
DMIMX8ML8_ca53.h42121 #define ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK (0x800U) macro
42128 …2_t)(((uint32_t)(x)) << ENET_QOS_MTL_DBG_CTL_FIFOWREN_SHIFT)) & ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9352/
DMIMX9352_cm33.h26576 #define ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK (0x800U) macro
26583 …2_t)(((uint32_t)(x)) << ENET_QOS_MTL_DBG_CTL_FIFOWREN_SHIFT)) & ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK)
DMIMX9352_ca55.h29478 #define ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK (0x800U) macro
29485 …2_t)(((uint32_t)(x)) << ENET_QOS_MTL_DBG_CTL_FIFOWREN_SHIFT)) & ENET_QOS_MTL_DBG_CTL_FIFOWREN_MASK)