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Searched refs:ENET_QOS_MAC_VLAN_INCL_CSVL_MASK (Results 1 – 11 of 11) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h37650 #define ENET_QOS_MAC_VLAN_INCL_CSVL_MASK (0x80000U) macro
37656 …int32_t)(((uint32_t)(x)) << ENET_QOS_MAC_VLAN_INCL_CSVL_SHIFT)) & ENET_QOS_MAC_VLAN_INCL_CSVL_MASK)
DMIMXRT1176_cm4.h37648 #define ENET_QOS_MAC_VLAN_INCL_CSVL_MASK (0x80000U) macro
37654 …int32_t)(((uint32_t)(x)) << ENET_QOS_MAC_VLAN_INCL_CSVL_SHIFT)) & ENET_QOS_MAC_VLAN_INCL_CSVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h34748 #define ENET_QOS_MAC_VLAN_INCL_CSVL_MASK (0x80000U) macro
34754 …int32_t)(((uint32_t)(x)) << ENET_QOS_MAC_VLAN_INCL_CSVL_SHIFT)) & ENET_QOS_MAC_VLAN_INCL_CSVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h34748 #define ENET_QOS_MAC_VLAN_INCL_CSVL_MASK (0x80000U) macro
34754 …int32_t)(((uint32_t)(x)) << ENET_QOS_MAC_VLAN_INCL_CSVL_SHIFT)) & ENET_QOS_MAC_VLAN_INCL_CSVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7.h34748 #define ENET_QOS_MAC_VLAN_INCL_CSVL_MASK (0x80000U) macro
34754 …int32_t)(((uint32_t)(x)) << ENET_QOS_MAC_VLAN_INCL_CSVL_SHIFT)) & ENET_QOS_MAC_VLAN_INCL_CSVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9131/
DMIMX9131.h20262 #define ENET_QOS_MAC_VLAN_INCL_CSVL_MASK (0x80000U) macro
20268 …int32_t)(((uint32_t)(x)) << ENET_QOS_MAC_VLAN_INCL_CSVL_SHIFT)) & ENET_QOS_MAC_VLAN_INCL_CSVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_dsp.h33156 #define ENET_QOS_MAC_VLAN_INCL_CSVL_MASK (0x80000U) macro
33162 …int32_t)(((uint32_t)(x)) << ENET_QOS_MAC_VLAN_INCL_CSVL_SHIFT)) & ENET_QOS_MAC_VLAN_INCL_CSVL_MASK)
DMIMX8ML8_cm7.h34748 #define ENET_QOS_MAC_VLAN_INCL_CSVL_MASK (0x80000U) macro
34754 …int32_t)(((uint32_t)(x)) << ENET_QOS_MAC_VLAN_INCL_CSVL_SHIFT)) & ENET_QOS_MAC_VLAN_INCL_CSVL_MASK)
DMIMX8ML8_ca53.h34774 #define ENET_QOS_MAC_VLAN_INCL_CSVL_MASK (0x80000U) macro
34780 …int32_t)(((uint32_t)(x)) << ENET_QOS_MAC_VLAN_INCL_CSVL_SHIFT)) & ENET_QOS_MAC_VLAN_INCL_CSVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9352/
DMIMX9352_cm33.h19305 #define ENET_QOS_MAC_VLAN_INCL_CSVL_MASK (0x80000U) macro
19311 …int32_t)(((uint32_t)(x)) << ENET_QOS_MAC_VLAN_INCL_CSVL_SHIFT)) & ENET_QOS_MAC_VLAN_INCL_CSVL_MASK)
DMIMX9352_ca55.h22207 #define ENET_QOS_MAC_VLAN_INCL_CSVL_MASK (0x80000U) macro
22213 …int32_t)(((uint32_t)(x)) << ENET_QOS_MAC_VLAN_INCL_CSVL_SHIFT)) & ENET_QOS_MAC_VLAN_INCL_CSVL_MASK)