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Searched refs:ENC2_BASE (Results 1 – 21 of 21) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h16493 #define ENC2_BASE (0x403CC000u) macro
16495 #define ENC2 ((ENC_Type *)ENC2_BASE)
16497 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h16473 #define ENC2_BASE (0x403CC000u) macro
16475 #define ENC2 ((ENC_Type *)ENC2_BASE)
16477 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h18586 #define ENC2_BASE (0x403CC000u) macro
18588 #define ENC2 ((ENC_Type *)ENC2_BASE)
18598 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h17515 #define ENC2_BASE (0x403CC000u) macro
17517 #define ENC2 ((ENC_Type *)ENC2_BASE)
17527 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h18588 #define ENC2_BASE (0x403CC000u) macro
18590 #define ENC2 ((ENC_Type *)ENC2_BASE)
18600 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h18300 #define ENC2_BASE (0x403CC000u) macro
18302 #define ENC2 ((ENC_Type *)ENC2_BASE)
18312 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h18954 #define ENC2_BASE (0x403CC000u) macro
18956 #define ENC2 ((ENC_Type *)ENC2_BASE)
18966 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h19740 #define ENC2_BASE (0x403CC000u) macro
19742 #define ENC2 ((ENC_Type *)ENC2_BASE)
19752 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h19818 #define ENC2_BASE (0x403CC000u) macro
19820 #define ENC2 ((ENC_Type *)ENC2_BASE)
19830 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm4.h32088 #define ENC2_BASE (0x40178000u) macro
32090 #define ENC2 ((ENC_Type *)ENC2_BASE)
32100 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
DMIMXRT1165_cm7.h32090 #define ENC2_BASE (0x40178000u) macro
32092 #define ENC2 ((ENC_Type *)ENC2_BASE)
32102 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h32402 #define ENC2_BASE (0x40178000u) macro
32404 #define ENC2 ((ENC_Type *)ENC2_BASE)
32414 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h32400 #define ENC2_BASE (0x40178000u) macro
32402 #define ENC2 ((ENC_Type *)ENC2_BASE)
32412 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
DMIMXRT1175_cm7.h32402 #define ENC2_BASE (0x40178000u) macro
32404 #define ENC2 ((ENC_Type *)ENC2_BASE)
32414 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm7.h34404 #define ENC2_BASE (0x40178000u) macro
34406 #define ENC2 ((ENC_Type *)ENC2_BASE)
34416 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
DMIMXRT1173_cm4.h34402 #define ENC2_BASE (0x40178000u) macro
34404 #define ENC2 ((ENC_Type *)ENC2_BASE)
34414 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm7.h34095 #define ENC2_BASE (0x40178000u) macro
34097 #define ENC2 ((ENC_Type *)ENC2_BASE)
34107 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
DMIMXRT1166_cm4.h34093 #define ENC2_BASE (0x40178000u) macro
34095 #define ENC2 ((ENC_Type *)ENC2_BASE)
34105 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h34407 #define ENC2_BASE (0x40178000u) macro
34409 #define ENC2 ((ENC_Type *)ENC2_BASE)
34419 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h34409 #define ENC2_BASE (0x40178000u) macro
34411 #define ENC2 ((ENC_Type *)ENC2_BASE)
34421 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }
DMIMXRT1176_cm4.h34407 #define ENC2_BASE (0x40178000u) macro
34409 #define ENC2 ((ENC_Type *)ENC2_BASE)
34419 #define ENC_BASE_ADDRS { 0u, ENC1_BASE, ENC2_BASE, ENC3_BASE, ENC4_BASE }