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Searched refs:EMIOS_ICU_IP_WSC_CHANNEL_OFFSET (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/s32/drivers/s32ze/Icu/src/
DEmios_Icu_Ip.c712 …s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSC1 &= ~eMIOS_WSC1_MOD… in Emios_Icu_Ip_Init()
723 … s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSC1 = wsRegisterValue; in Emios_Icu_Ip_Init()
731 … s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSC2 = wsRegisterValue; in Emios_Icu_Ip_Init()
733 …s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSEV |= eMIOS_WSEV_EVEN… in Emios_Icu_Ip_Init()
735 …s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSFC |= eMIOS_WSFC_FOOE… in Emios_Icu_Ip_Init()
738 …s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSC1 |= eMIOS_WSC1_MODE… in Emios_Icu_Ip_Init()
848 …s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSC1 &= ~eMIOS_WSC1_MOD… in Emios_Icu_Ip_Deinit()
850 …s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSCAEC &= ~eMIOS_WSCAEC… in Emios_Icu_Ip_Deinit()
851 s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSEV = 0U; in Emios_Icu_Ip_Deinit()
853 s_emiosBase[instance]->CH.WSC[hwChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET].WSC2 = 0U; in Emios_Icu_Ip_Deinit()
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DEmios_Icu_Ip_Irq.c922 hwWSChannelId = hwWSChannel + EMIOS_ICU_IP_WSC_CHANNEL_OFFSET; in Emios_Icu_Ip_WSCProcessInterrupt()
/hal_nxp-latest/s32/soc/s32z270/include/
DEmios_Icu_Ip_Defines.h137 #define EMIOS_ICU_IP_WSC_CHANNEL_OFFSET (4U) macro