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Searched refs:EMAC_DMA_CH1_INTERRUPT_ENABLE_RSE_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_EMAC.h6625 #define EMAC_DMA_CH1_INTERRUPT_ENABLE_RSE_MASK (0x100U) macro
6628 …int32_t)(x)) << EMAC_DMA_CH1_INTERRUPT_ENABLE_RSE_SHIFT)) & EMAC_DMA_CH1_INTERRUPT_ENABLE_RSE_MASK)
/hal_nxp-latest/s32/drivers/s32k3/Eth_GMAC/include/
DEmac_Ip_Wrapper.h4917 #define GMAC_DMA_CH1_INTERRUPT_ENABLE_RSE_MASK EMAC_DMA_CH1_INTERRUPT_ENABLE_RSE_MASK