Searched refs:EIM_CSRCR2_REG (Results 1 – 2 of 2) sorted by relevance
| /hal_nxp-latest/imx/devices/MCIMX6X/ |
| D | MCIMX6X_M4.h | 8118 #define EIM_CSRCR2_REG(base,index) ((base)->CS[index].CSRCR2) macro 8380 #define EIM_CS0RCR2 EIM_CSRCR2_REG(EIM_BASE_PTR,0) 8386 #define EIM_CS1RCR2 EIM_CSRCR2_REG(EIM_BASE_PTR,1) 8392 #define EIM_CS2RCR2 EIM_CSRCR2_REG(EIM_BASE_PTR,2) 8398 #define EIM_CS3RCR2 EIM_CSRCR2_REG(EIM_BASE_PTR,3) 8404 #define EIM_CS4RCR2 EIM_CSRCR2_REG(EIM_BASE_PTR,4) 8410 #define EIM_CS5RCR2 EIM_CSRCR2_REG(EIM_BASE_PTR,5) 8422 #define EIM_CSRCR2(index) EIM_CSRCR2_REG(EIM_BASE_PTR,index)
|
| /hal_nxp-latest/imx/devices/MCIMX7D/ |
| D | MCIMX7D_M4.h | 12761 #define EIM_CSRCR2_REG(base,index) ((base)->CS[index].CSRCR2) macro 13022 #define EIM_CS0RCR2 EIM_CSRCR2_REG(EIM_BASE_PTR,0) 13028 #define EIM_CS1RCR2 EIM_CSRCR2_REG(EIM_BASE_PTR,1) 13034 #define EIM_CS2RCR2 EIM_CSRCR2_REG(EIM_BASE_PTR,2) 13040 #define EIM_CS3RCR2 EIM_CSRCR2_REG(EIM_BASE_PTR,3) 13046 #define EIM_CS4RCR2 EIM_CSRCR2_REG(EIM_BASE_PTR,4) 13052 #define EIM_CS5RCR2 EIM_CSRCR2_REG(EIM_BASE_PTR,5) 13064 #define EIM_CSRCR2(index) EIM_CSRCR2_REG(EIM_BASE_PTR,index)
|