1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2020 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8 #ifndef FSL_EEPROM_H_
9 #define FSL_EEPROM_H_
10
11 #include "fsl_common.h"
12 #include "fsl_power.h"
13 /*!
14 * @addtogroup eeprom
15 * @{
16 */
17
18 /*******************************************************************************
19 * Definitions
20 ******************************************************************************/
21
22 /*! @name Driver version */
23 /*! @{ */
24 /*! @brief EEPROM driver version 2.1.3. */
25 #define FSL_EEPROM_DRIVER_VERSION (MAKE_VERSION(2, 1, 3))
26 /*! @} */
27
28 /*! @brief EEPROM automatic program option */
29 typedef enum _eeprom_auto_program
30 {
31 kEEPROM_AutoProgramDisable = 0x0, /*!< Disable auto program */
32 kEEPROM_AutoProgramWriteWord = 0x1, /*!< Auto program triggered after 1 word is written */
33 kEEPROM_AutoProgramLastWord = 0x2 /*!< Auto program triggered after last word of a page written */
34 } eeprom_auto_program_t;
35
36 /*! @brief EEPROM interrupt source */
37 typedef enum _eeprom_interrupt_enable
38 {
39 kEEPROM_ProgramFinishInterruptEnable = EEPROM_INTENSET_PROG_SET_EN_MASK, /*!< Interrupt while program finished */
40 } eeprom_interrupt_enable_t;
41
42 /*!
43 * @brief EEPROM region configuration structure.
44 */
45 typedef struct _eeprom_config
46 {
47 eeprom_auto_program_t autoProgram; /*!< Automatic program feature. */
48 uint8_t readWaitPhase1; /*!< EEPROM read waiting phase 1 */
49 uint8_t readWaitPhase2; /*!< EEPROM read waiting phase 2 */
50 uint8_t writeWaitPhase1; /*!< EEPROM write waiting phase 1 */
51 uint8_t writeWaitPhase2; /*!< EEPROM write waiting phase 2 */
52 uint8_t writeWaitPhase3; /*!< EEPROM write waiting phase 3 */
53 bool lockTimingParam; /*!< If lock the read and write wait phase settings */
54 } eeprom_config_t;
55
56 /*******************************************************************************
57 * API
58 ******************************************************************************/
59
60 #if defined(__cplusplus)
61 extern "C" {
62 #endif /* _cplusplus */
63
64 /*!
65 * @name Initialization and deinitialization
66 * @{
67 */
68
69 /*!
70 * @brief Initializes the EEPROM with the user configuration structure.
71 *
72 * This function configures the EEPROM module with the user-defined configuration. This function also sets the
73 * internal clock frequency to about 155kHz according to the source clock frequency.
74 *
75 * @param base EEPROM peripheral base address.
76 * @param config The pointer to the configuration structure.
77 * @param sourceClock_Hz EEPROM source clock frequency in Hz.
78 */
79 void EEPROM_Init(EEPROM_Type *base, const eeprom_config_t *config, uint32_t sourceClock_Hz);
80
81 /*!
82 * @brief Get EEPROM default configure settings.
83 *
84 * @param config EEPROM config structure pointer.
85 */
86 void EEPROM_GetDefaultConfig(eeprom_config_t *config);
87
88 /*!
89 * @brief Deinitializes the EEPROM regions.
90 *
91 * @param base EEPROM peripheral base address.
92 */
93 void EEPROM_Deinit(EEPROM_Type *base);
94
95 /*! @} */
96
97 /*!
98 * @name Basic Control Operations
99 * @{
100 */
101
102 /*!
103 * @brief Set EEPROM automatic program feature.
104 *
105 * EEPROM write always needs a program and erase cycle to write the data into EEPROM. This program and erase cycle can
106 * be finished automaticlly or manually. If users want to use or disable auto program feature, users can call this API.
107 *
108 * @param base EEPROM peripheral base address.
109 * @param autoProgram EEPROM auto program feature need to set.
110 */
EEPROM_SetAutoProgram(EEPROM_Type * base,eeprom_auto_program_t autoProgram)111 static inline void EEPROM_SetAutoProgram(EEPROM_Type *base, eeprom_auto_program_t autoProgram)
112 {
113 base->AUTOPROG = (uint32_t)autoProgram;
114 }
115
116 /*!
117 * @brief Set EEPROM to in/out power down mode.
118 *
119 * This function make EEPROM eneter or out of power mode. Notice that, users shall not put EEPROM into power down mode
120 * while there is still any pending EEPROM operation. While EEPROM is wakes up from power down mode, any EEPROM
121 * operation has to be suspended for 100 us.
122 *
123 * @param base EEPROM peripheral base address.
124 * @param enable True means enter to power down mode, false means wake up.
125 */
EEPROM_SetPowerDownMode(EEPROM_Type * base,bool enable)126 static inline void EEPROM_SetPowerDownMode(EEPROM_Type *base, bool enable)
127 {
128 base->PWRDWN = (uint32_t)enable;
129 }
130
131 /*!
132 * @brief Enable EEPROM interrupt.
133 *
134 * @param base EEPROM peripheral base address.
135 * @param mask EEPROM interrupt enable mask. It is a logic OR of members the
136 * enumeration :: eeprom_interrupt_enable_t
137 */
EEPROM_EnableInterrupt(EEPROM_Type * base,uint32_t mask)138 static inline void EEPROM_EnableInterrupt(EEPROM_Type *base, uint32_t mask)
139 {
140 base->INTENSET = mask;
141 }
142
143 /*!
144 * @brief Disable EEPROM interrupt.
145 *
146 * @param base EEPROM peripheral base address.
147 * @param mask EEPROM interrupt enable mask. It is a logic OR of members the
148 * enumeration :: eeprom_interrupt_enable_t
149 */
EEPROM_DisableInterrupt(EEPROM_Type * base,uint32_t mask)150 static inline void EEPROM_DisableInterrupt(EEPROM_Type *base, uint32_t mask)
151 {
152 base->INTENCLR = mask;
153 }
154
155 /*!
156 * @brief Get the status of all interrupt flags for ERPROM.
157 *
158 * @param base EEPROM peripheral base address.
159 * @return EEPROM interrupt flag status
160 */
EEPROM_GetInterruptStatus(EEPROM_Type * base)161 static inline uint32_t EEPROM_GetInterruptStatus(EEPROM_Type *base)
162 {
163 return base->INTSTAT;
164 }
165
166 /*!
167 * @brief Clear interrupt flags manually.
168 *
169 * This API clears interrupt flags manually. Call this API will clear the corresponding bit in INSTAT register.
170 *
171 * @param base EEPROM peripheral base address.
172 * @param mask EEPROM interrupt flag need to be cleared. It is a logic OR of members of
173 * enumeration:: eeprom_interrupt_enable_t
174 */
EEPROM_ClearInterruptFlag(EEPROM_Type * base,uint32_t mask)175 static inline void EEPROM_ClearInterruptFlag(EEPROM_Type *base, uint32_t mask)
176 {
177 base->INTSTATCLR = mask;
178 }
179
180 /*!
181 * @brief Get the status of enabled interrupt flags for ERPROM.
182 *
183 * @param base EEPROM peripheral base address.
184 * @return EEPROM enabled interrupt flag status
185 */
EEPROM_GetEnabledInterruptStatus(EEPROM_Type * base)186 static inline uint32_t EEPROM_GetEnabledInterruptStatus(EEPROM_Type *base)
187 {
188 return base->INTEN;
189 }
190
191 /*!
192 * @brief Set interrupt flags manually.
193 *
194 * This API trigger a interrupt manually, users can no need to wait for hardware trigger interrupt. Call this API will
195 * set the corresponding bit in INSTAT register.
196 *
197 * @param base EEPROM peripheral base address.
198 * @param mask EEPROM interrupt flag need to be set. It is a logic OR of members of
199 * enumeration:: eeprom_interrupt_enable_t
200 */
EEPROM_SetInterruptFlag(EEPROM_Type * base,uint32_t mask)201 static inline void EEPROM_SetInterruptFlag(EEPROM_Type *base, uint32_t mask)
202 {
203 base->INTSTATSET = mask;
204 }
205
206 /*!
207 * @brief Write a word data in address of EEPROM.
208 *
209 * Users can write a page or at least a word data into EEPROM address.
210 *
211 * @param base EEPROM peripheral base address.
212 * @param offset Offset from the begining address of EEPROM. This value shall be 4-byte aligned.
213 * @param data Data need be write.
214 */
215 status_t EEPROM_WriteWord(EEPROM_Type *base, uint32_t offset, uint32_t data);
216
217 /*!
218 * @brief Write data from a user allocated buffer in address of EEPROM.
219 *
220 * Users can write any bytes data into EEPROM address by wBuf.
221 *
222 * @param base EEPROM peripheral base address.
223 * @param offset Offset from the begining address of EEPROM.
224 * @param wBuf Data need be write.
225 * @param size Number of bytes to write.
226 */
227 void EEPROM_Write(EEPROM_Type *base, uint32_t offset, void *wBuf, uint32_t size);
228
229 /*!
230 * @name Data Check Operations
231 * @{
232 */
233 #if !(defined(FSL_FEATURE_EEPROM_PAGE_COUNT) && FSL_FEATURE_EEPROM_PAGE_COUNT)
234 /*!
235 * @brief read eeprom device status manually.
236 *
237 * This API read eeprom device status manually. Call this API will read the corresponding bit in STATUS register.
238 *
239 * @param base EEPROM peripheral base address.
240 */
EEPROM_GetDeviceStatus(EEPROM_Type * base)241 static inline uint32_t EEPROM_GetDeviceStatus(EEPROM_Type *base)
242 {
243 return base->STATUS;
244 }
245
246 /*!
247 * @brief read ecc error count manually.
248 *
249 * This API read ecc error count manually. Call this API will read the corresponding bit in ECCERRCNT register.
250 *
251 * @param base EEPROM peripheral base address.
252 */
EEPROM_GetEccErrorCount(EEPROM_Type * base)253 static inline uint32_t EEPROM_GetEccErrorCount(EEPROM_Type *base)
254 {
255 return base->ECCERRCNT;
256 }
257
258 /*!
259 * @brief set ecc error count manually.
260 *
261 * This API set ecc error count manually. Call this API will set the corresponding bit in ECCERRCNT register.
262 *
263 * @param base EEPROM peripheral base address.
264 * @param mask The mask of ecc error status.
265 */
EEPROM_SetEccErrorCount(EEPROM_Type * base,uint32_t mask)266 static inline void EEPROM_SetEccErrorCount(EEPROM_Type *base, uint32_t mask)
267 {
268 base->ECCERRCNT = mask;
269 }
270
271 /*!
272 * @brief set checksum start address manually.
273 *
274 * This API set checksum start address manually. Call this API will set the corresponding bit in MSSTART register.
275 *
276 * @param base EEPROM peripheral base address.
277 * @param mask The mask of checksum start address.
278 */
EEPROM_SetCheckStartAddress(EEPROM_Type * base,uint32_t mask)279 static inline void EEPROM_SetCheckStartAddress(EEPROM_Type *base, uint32_t mask)
280 {
281 base->MSSTART = mask;
282 }
283 /*!
284 * @brief set checksum stop address manually.
285 *
286 * This API set checksum stop address manually. Call this API will set the corresponding bit in MSSTOP register.
287 *
288 * @param base EEPROM peripheral base address.
289 * @param mask The mask of checksum stop address.
290 */
EEPROM_SetCheckStopAddress(EEPROM_Type * base,uint32_t mask)291 static inline void EEPROM_SetCheckStopAddress(EEPROM_Type *base, uint32_t mask)
292 {
293 base->MSSTOP = mask;
294 }
295
296 /*!
297 * @brief read data signature manually.
298 *
299 * This API read data signature manually. Call this API will clear the corresponding bit in MSDATASIG register.
300 *
301 * @param base EEPROM peripheral base address.sss
302 *
303 */
EEPROM_GetDataSignature(EEPROM_Type * base)304 static inline uint32_t EEPROM_GetDataSignature(EEPROM_Type *base)
305 {
306 return base->MSDATASIG;
307 }
308
309 /*!
310 * @brief read parity signature manually.
311 *
312 * This API read parity signature manually. Call this API will clear the corresponding bit in MSPARSIG register.
313 *
314 * @param base EEPROM peripheral base address.
315 */
EEPROM_GetParitySignature(EEPROM_Type * base)316 static inline uint32_t EEPROM_GetParitySignature(EEPROM_Type *base)
317 {
318 return base->MSPARSIG;
319 }
320
321 /*!
322 * @brief Write a row data into EEPROM.
323 *
324 * Users can write a row or at least a word data into EEPROM address.
325 *
326 * @param base EEPROM peripheral base address.
327 * @param rowNum Row number to be written.
328 * @param data Data need be write. This array data size shall equals to the row size.
329 */
330 status_t EEPROM_WriteRow(EEPROM_Type *base, uint32_t rowNum, uint32_t *data);
331
332 /*!
333 * @brief Write a page data into EEPROM.
334 *
335 * Users can write a page or at least a word data into EEPROM address.
336 *
337 * @param base EEPROM peripheral base address.
338 * @param pageNum Page number to be written.
339 * @param data Data need be write. This array data size shall equals to the page size.
340 */
341 #else
342 status_t EEPROM_WritePage(EEPROM_Type *base, uint32_t pageNum, uint32_t *data);
343 #endif /* FSL_FEATURE_EEPROM_PAGE_COUNT */
344
345 /*! @} */
346
347 #if defined(__cplusplus)
348 }
349 #endif
350
351 /*! @}*/
352 #endif /*FSL_EEPROM_H_*/
353
