| /hal_nxp-latest/mcux/mcux-sdk/drivers/cau3/ |
| D | fsl_cau3.h | 895 const uint8_t *E,
1145 const uint8_t *E,
1180 const uint8_t *E,
1213 const uint8_t *E,
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| D | fsl_cau3.c | 804 static status_t cau3_pkha_clear_regabne(CAU3_Type *base, bool A, bool B, bool N, bool E);
2357 static status_t cau3_pkha_clear_regabne(CAU3_Type *base, bool A, bool B, bool N, bool E) in cau3_pkha_clear_regabne() argument
2377 if (E) in cau3_pkha_clear_regabne()
2515 const uint8_t *E, in cau3_pkha_init_data() argument
2540 …lear_regabne(base, (bool)(uintptr_t)A, (bool)(uintptr_t)B, (bool)(uintptr_t)N, (bool)(uintptr_t)E); in cau3_pkha_init_data()
2574 if (E != NULL) in cau3_pkha_init_data()
2576 (void)cau3_pkha_write_reg(base, kCAU3_PKHA_RegE, 0, E, sizeE); in cau3_pkha_init_data()
3307 const uint8_t *E, in CAU3_PKHA_ModExp() argument
3341 cau3_pkha_init_data(base, A, sizeA, NULL, 0, N, sizeN, E, sizeE); in CAU3_PKHA_ModExp()
3971 const uint8_t *E, in CAU3_PKHA_ECC_PointMul() argument
[all …]
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| /hal_nxp-latest/s32/ |
| D | README | 54 Patch List for S32Z/E:
64 for S32Z/E.
|
| /hal_nxp-latest/mcux/mcux-sdk/drivers/ltc/ |
| D | fsl_ltc.c | 178 static status_t ltc_pkha_clear_regabne(LTC_Type *base, bool A, bool B, bool N, bool E);
3823 static status_t ltc_pkha_clear_regabne(LTC_Type *base, bool A, bool B, bool N, bool E) in ltc_pkha_clear_regabne() argument
3843 if (E) in ltc_pkha_clear_regabne()
3978 const uint8_t *E, in ltc_pkha_init_data() argument
4003 …lear_regabne(base, (bool)(uintptr_t)A, (bool)(uintptr_t)B, (bool)(uintptr_t)N, (bool)(uintptr_t)E); in ltc_pkha_init_data()
4037 if (NULL != E) in ltc_pkha_init_data()
4039 (void)ltc_pkha_write_reg(base, kLTC_PKHA_RegE, 0, E, sizeE); in ltc_pkha_init_data()
4689 const uint8_t *E, in LTC_PKHA_ModExp() argument
4714 ltc_pkha_init_data(base, A, sizeA, NULL, 0, N, sizeN, E, sizeE); in LTC_PKHA_ModExp()
5136 const uint8_t *E, in LTC_PKHA_ECC_PointMul() argument
[all …]
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| D | fsl_ltc.h | 1375 const uint8_t *E,
1580 const uint8_t *E,
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/caam/ |
| D | fsl_caam.c | 7647 const uint8_t *E, in caam_pkha_algorithm_operation_command() argument
7700 if ((E != NULL) && (sizeE != 0U)) in caam_pkha_algorithm_operation_command()
7704 DESC_SET_ADDR(descriptor[10], E); in caam_pkha_algorithm_operation_command()
7776 const uint8_t *E, in caam_pkha_ecc_algorithm_operation_command() argument
7854 if ((E != NULL) && (sizeE != 0U)) in caam_pkha_ecc_algorithm_operation_command()
7857 DESC_SET_ADDR(descriptor[20], E); in caam_pkha_ecc_algorithm_operation_command()
8448 const uint8_t *E,
8463 const uint8_t *E, in CAAM_PKHA_ModExpNonBlocking() argument
8488 …m_pkha_algorithm_operation_command(base, handle, descriptor, A, sizeA, NULL, 0, N, sizeN, E, sizeE, in CAAM_PKHA_ModExpNonBlocking()
8519 const uint8_t *E, in CAAM_PKHA_ModExp() argument
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/gcc/ |
| D | MIMX8QX6xxxxx_cm4_ram.ld | 7 ** Reference manual: IMX8DQXPRM, Rev. E, 6/2019
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/gcc/ |
| D | MIMX8QX3xxxxx_cm4_ram.ld | 5 ** Reference manual: IMX8DQXPRM, Rev. E, 6/2019
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/gcc/ |
| D | MIMX8DX4xxxxx_cm4_ram.ld | 5 ** Reference manual: IMX8DQXPRM, Rev. E, 6/2019
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX2/gcc/ |
| D | MIMX8QX2xxxxx_cm4_ram.ld | 7 ** Reference manual: IMX8DQXPRM, Rev. E, 6/2019
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/gcc/ |
| D | MIMX8QX5xxxxx_cm4_ram.ld | 7 ** Reference manual: IMX8DQXPRM, Rev. E, 6/2019
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/gcc/ |
| D | MIMX8QM6xxxFF_cm4_core1_ram.ld | 5 ** Reference manual: IMX8QMRM, Rev. E, Jun. 2018
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX1/gcc/ |
| D | MIMX8QX1xxxxx_cm4_ram.ld | 7 ** Reference manual: IMX8DQXPRM, Rev. E, 6/2019
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/gcc/ |
| D | LPC5536_flash.ld | 35 POWERQUAD_RAMSIZE = DEFINED(__powerquad__) ? 0x00004000 : 0x00000000; /* SRAM E(16K) reserved for…
|
| D | LPC5536_ram.ld | 35 POWERQUAD_RAMSIZE = DEFINED(__powerquad__) ? 0x00004000 : 0x0; /* SRAM E(16K) reserved …
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/gcc/ |
| D | MIMX8DX6xxxxx_cm4_ram.ld | 7 ** Reference manual: IMX8DQXPRM, Rev. E, 6/2019
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX2/gcc/ |
| D | MIMX8DX2xxxxx_cm4_ram.ld | 7 ** Reference manual: IMX8DQXPRM, Rev. E, 6/2019
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/gcc/ |
| D | LPC55S36_flash.ld | 34 POWERQUAD_RAMSIZE = DEFINED(__powerquad__) ? 0x00004000 : 0x00000000; /* SRAM E(16K) reserved for…
|
| D | LPC55S36_ram.ld | 34 POWERQUAD_RAMSIZE = DEFINED(__powerquad__) ? 0x00004000 : 0x0; /* SRAM E(16K) reserved …
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/gcc/ |
| D | MIMX8DX3xxxxx_cm4_ram.ld | 5 ** Reference manual: IMX8DQXPRM, Rev. E, 6/2019
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/gcc/ |
| D | MIMX8QX4xxxxx_cm4_ram.ld | 5 ** Reference manual: IMX8DQXPRM, Rev. E, 6/2019
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/gcc/ |
| D | MIMX8DX5xxxxx_cm4_ram.ld | 7 ** Reference manual: IMX8DQXPRM, Rev. E, 6/2019
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/gcc/ |
| D | MIMX8UX5xxxxx_cm4_ram.ld | 8 ** Reference manual: IMX8DQXPRM, Rev. E, 6/2019
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/gcc/ |
| D | MIMX8UX6xxxxx_cm4_ram.ld | 8 ** Reference manual: IMX8DQXPRM, Rev. E, 6/2019
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX1/gcc/ |
| D | MIMX8DX1xxxxx_cm4_ram.ld | 7 ** Reference manual: IMX8DQXPRM, Rev. E, 6/2019
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