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Searched refs:DWC_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_MASK (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h28837 #define DWC_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_MASK (0x1E0U) macro
28841 …_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_SHIFT)) & DWC_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_M…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h28837 #define DWC_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_MASK (0x1E0U) macro
28841 …_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_SHIFT)) & DWC_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_M…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7.h28837 #define DWC_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_MASK (0x1E0U) macro
28841 …_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_SHIFT)) & DWC_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_M…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_dsp.h27656 #define DWC_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_MASK (0x1E0U) macro
27659 …_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_SHIFT)) & DWC_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_M…
DMIMX8ML8_cm7.h28837 #define DWC_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_MASK (0x1E0U) macro
28841 …_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_SHIFT)) & DWC_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_M…
DMIMX8ML8_ca53.h28864 #define DWC_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_MASK (0x1E0U) macro
28868 …_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_SHIFT)) & DWC_DDRPHYA_MASTER_PLLCTRL1_P3_PLLCPPROPCTRL_M…