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Searched refs:DWC_DDRPHYA_MASTER_DMIPINPRESENT_P1_RDDBIENABLED_SHIFT (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h27891 #define DWC_DDRPHYA_MASTER_DMIPINPRESENT_P1_RDDBIENABLED_SHIFT (0U) macro
27894 …_RDDBIENABLED(x) (((uint16_t)(((uint16_t)(x)) << DWC_DDRPHYA_MASTER_DMIPINPRESENT_P1_RDDBIENABLED_…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h27891 #define DWC_DDRPHYA_MASTER_DMIPINPRESENT_P1_RDDBIENABLED_SHIFT (0U) macro
27894 …_RDDBIENABLED(x) (((uint16_t)(((uint16_t)(x)) << DWC_DDRPHYA_MASTER_DMIPINPRESENT_P1_RDDBIENABLED_…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7.h27891 #define DWC_DDRPHYA_MASTER_DMIPINPRESENT_P1_RDDBIENABLED_SHIFT (0U) macro
27894 …_RDDBIENABLED(x) (((uint16_t)(((uint16_t)(x)) << DWC_DDRPHYA_MASTER_DMIPINPRESENT_P1_RDDBIENABLED_…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_dsp.h26758 #define DWC_DDRPHYA_MASTER_DMIPINPRESENT_P1_RDDBIENABLED_SHIFT (0U) macro
26760 …_RDDBIENABLED(x) (((uint16_t)(((uint16_t)(x)) << DWC_DDRPHYA_MASTER_DMIPINPRESENT_P1_RDDBIENABLED_…
DMIMX8ML8_cm7.h27891 #define DWC_DDRPHYA_MASTER_DMIPINPRESENT_P1_RDDBIENABLED_SHIFT (0U) macro
27894 …_RDDBIENABLED(x) (((uint16_t)(((uint16_t)(x)) << DWC_DDRPHYA_MASTER_DMIPINPRESENT_P1_RDDBIENABLED_…
DMIMX8ML8_ca53.h27918 #define DWC_DDRPHYA_MASTER_DMIPINPRESENT_P1_RDDBIENABLED_SHIFT (0U) macro
27921 …_RDDBIENABLED(x) (((uint16_t)(((uint16_t)(x)) << DWC_DDRPHYA_MASTER_DMIPINPRESENT_P1_RDDBIENABLED_…