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Searched refs:DSPCPUCLKSELA (Results 1 – 19 of 19) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_power.c858 dspclk_sel[0] = CLKCTL1->DSPCPUCLKSELA; in POWER_EnterDeepSleep()
923 CLKCTL1->DSPCPUCLKSELA = CLKCTL1_DSPCPUCLKSELA_SEL(0); in POWER_EnterDeepSleep()
1009 CLKCTL1->DSPCPUCLKSELA = dspclk_sel[0] & CLKCTL1_DSPCPUCLKSELA_SEL_MASK; in POWER_EnterDeepSleep()
Dfsl_clock.c378 switch ((CLKCTL1->DSPCPUCLKSELA) & CLKCTL1_DSPCPUCLKSELA_SEL_MASK) in CLOCK_GetDspMainClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_power.c858 dspclk_sel[0] = CLKCTL1->DSPCPUCLKSELA; in POWER_EnterDeepSleep()
923 CLKCTL1->DSPCPUCLKSELA = CLKCTL1_DSPCPUCLKSELA_SEL(0); in POWER_EnterDeepSleep()
1009 CLKCTL1->DSPCPUCLKSELA = dspclk_sel[0] & CLKCTL1_DSPCPUCLKSELA_SEL_MASK; in POWER_EnterDeepSleep()
Dfsl_clock.c378 switch ((CLKCTL1->DSPCPUCLKSELA) & CLKCTL1_DSPCPUCLKSELA_SEL_MASK) in CLOCK_GetDspMainClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
Dsystem_MIMXRT595S_dsp.c107 switch ((CLKCTL1->DSPCPUCLKSELA) & CLKCTL1_DSPCPUCLKSELA_SEL_MASK) in SystemCoreClockUpdate()
DMIMXRT595S_dsp.h4128 __IO uint32_t DSPCPUCLKSELA; /**< DSP CPU Clock Select A, offset: 0x430 */ member
DMIMXRT595S_cm33.h10385 __IO uint32_t DSPCPUCLKSELA; /**< DSP CPU Clock Select A, offset: 0x430 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_power.c898 dspclk_sel[0] = CLKCTL1->DSPCPUCLKSELA; in AT_QUICKACCESS_SECTION_CODE()
1017 CLKCTL1->DSPCPUCLKSELA = CLKCTL1_DSPCPUCLKSELA_SEL(0); in AT_QUICKACCESS_SECTION_CODE()
1107 CLKCTL1->DSPCPUCLKSELA = dspclk_sel[0] & CLKCTL1_DSPCPUCLKSELA_SEL_MASK; in AT_QUICKACCESS_SECTION_CODE()
Dfsl_clock.c384 switch ((CLKCTL1->DSPCPUCLKSELA) & CLKCTL1_DSPCPUCLKSELA_SEL_MASK) in CLOCK_GetDspMainClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_power.c898 dspclk_sel[0] = CLKCTL1->DSPCPUCLKSELA; in AT_QUICKACCESS_SECTION_CODE()
1017 CLKCTL1->DSPCPUCLKSELA = CLKCTL1_DSPCPUCLKSELA_SEL(0); in AT_QUICKACCESS_SECTION_CODE()
1107 CLKCTL1->DSPCPUCLKSELA = dspclk_sel[0] & CLKCTL1_DSPCPUCLKSELA_SEL_MASK; in AT_QUICKACCESS_SECTION_CODE()
Dfsl_clock.c384 switch ((CLKCTL1->DSPCPUCLKSELA) & CLKCTL1_DSPCPUCLKSELA_SEL_MASK) in CLOCK_GetDspMainClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_power.c898 dspclk_sel[0] = CLKCTL1->DSPCPUCLKSELA; in AT_QUICKACCESS_SECTION_CODE()
1017 CLKCTL1->DSPCPUCLKSELA = CLKCTL1_DSPCPUCLKSELA_SEL(0); in AT_QUICKACCESS_SECTION_CODE()
1107 CLKCTL1->DSPCPUCLKSELA = dspclk_sel[0] & CLKCTL1_DSPCPUCLKSELA_SEL_MASK; in AT_QUICKACCESS_SECTION_CODE()
Dfsl_clock.c384 switch ((CLKCTL1->DSPCPUCLKSELA) & CLKCTL1_DSPCPUCLKSELA_SEL_MASK) in CLOCK_GetDspMainClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
Dsystem_MIMXRT685S_dsp.c133 switch ((CLKCTL1->DSPCPUCLKSELA) & CLKCTL1_DSPCPUCLKSELA_SEL_MASK) in SystemCoreClockUpdate()
DMIMXRT685S_dsp.h2739 __IO uint32_t DSPCPUCLKSELA; /**< DSP clock selection A, offset: 0x430 */ member
DMIMXRT685S_cm33.h8469 __IO uint32_t DSPCPUCLKSELA; /**< DSP clock selection A, offset: 0x430 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h8469 __IO uint32_t DSPCPUCLKSELA; /**< DSP clock selection A, offset: 0x430 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h10381 __IO uint32_t DSPCPUCLKSELA; /**< DSP CPU Clock Select A, offset: 0x430 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h10384 __IO uint32_t DSPCPUCLKSELA; /**< DSP CPU Clock Select A, offset: 0x430 */ member