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Searched refs:DMA__LPCG_CAN1_BASE (Results 1 – 5 of 5) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/drivers/
Dfsl_clock.h292 kCLOCK_DMA_Can1 = LPCG_TUPLE(SC_R_CAN_1, DMA__LPCG_CAN1_BASE),
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_ca53.h19859 #define DMA__LPCG_CAN1_BASE (0x5ACE0000u) macro
19861 #define DMA__LPCG_CAN1 ((DMA_LPCG_CAN1_Type *)DMA__LPCG_CAN1_BASE)
19863 #define DMA_LPCG_CAN1_BASE_ADDRS { DMA__LPCG_CAN1_BASE }
DMIMX8QM6_dsp.h20036 #define DMA__LPCG_CAN1_BASE (0x5ACE0000u) macro
20038 #define DMA__LPCG_CAN1 ((DMA_LPCG_CAN1_Type *)DMA__LPCG_CAN1_BASE)
20040 #define DMA_LPCG_CAN1_BASE_ADDRS { DMA__LPCG_CAN1_BASE }
DMIMX8QM6_cm4_core1.h15262 #define DMA__LPCG_CAN1_BASE (0x5ACE0000u) macro
15264 #define DMA__LPCG_CAN1 ((DMA_LPCG_CAN1_Type *)DMA__LPCG_CAN1_BASE)
15266 #define DMA_LPCG_CAN1_BASE_ADDRS { DMA__LPCG_CAN1_BASE }
DMIMX8QM6_cm4_core0.h15262 #define DMA__LPCG_CAN1_BASE (0x5ACE0000u) macro
15264 #define DMA__LPCG_CAN1 ((DMA_LPCG_CAN1_Type *)DMA__LPCG_CAN1_BASE)
15266 #define DMA_LPCG_CAN1_BASE_ADDRS { DMA__LPCG_CAN1_BASE }