Home
last modified time | relevance | path

Searched refs:DMA__LPCG_ADC1_BASE (Results 1 – 5 of 5) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/drivers/
Dfsl_clock.h288 kCLOCK_DMA_Lpadc1 = LPCG_TUPLE(SC_R_ADC_1, DMA__LPCG_ADC1_BASE),
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_ca53.h19587 #define DMA__LPCG_ADC1_BASE (0x5AC90000u) macro
19589 #define DMA__LPCG_ADC1 ((DMA_LPCG_ADC1_Type *)DMA__LPCG_ADC1_BASE)
19591 #define DMA_LPCG_ADC1_BASE_ADDRS { DMA__LPCG_ADC1_BASE }
DMIMX8QM6_dsp.h19764 #define DMA__LPCG_ADC1_BASE (0x5AC90000u) macro
19766 #define DMA__LPCG_ADC1 ((DMA_LPCG_ADC1_Type *)DMA__LPCG_ADC1_BASE)
19768 #define DMA_LPCG_ADC1_BASE_ADDRS { DMA__LPCG_ADC1_BASE }
DMIMX8QM6_cm4_core1.h15082 #define DMA__LPCG_ADC1_BASE (0x5AC90000u) macro
15084 #define DMA__LPCG_ADC1 ((DMA_LPCG_ADC1_Type *)DMA__LPCG_ADC1_BASE)
15086 #define DMA_LPCG_ADC1_BASE_ADDRS { DMA__LPCG_ADC1_BASE }
DMIMX8QM6_cm4_core0.h15082 #define DMA__LPCG_ADC1_BASE (0x5AC90000u) macro
15084 #define DMA__LPCG_ADC1 ((DMA_LPCG_ADC1_Type *)DMA__LPCG_ADC1_BASE)
15086 #define DMA_LPCG_ADC1_BASE_ADDRS { DMA__LPCG_ADC1_BASE }