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Searched refs:DMA_TCD_CSR_INTHALF_MASK (Results 1 – 25 of 97) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K118_DMA.h753 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
756 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)
DS32K116_DMA.h753 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
756 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)
DS32K148_DMA.h1113 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
1116 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)
DS32K144W_DMA.h1113 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
1116 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)
DS32K144_DMA.h1113 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
1116 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)
DS32K142W_DMA.h1113 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
1116 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)
DS32K142_DMA.h1113 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
1116 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)
DS32K146_DMA.h1113 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
1116 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/drivers/dma3/
Dfsl_ad_edma.h137 …kEDMA_HalfInterruptEnable = DMA_TCD_CSR_INTHALF_MASK, /*!< Enable interrupt while major count to…
Dfsl_edma.h137 …kEDMA_HalfInterruptEnable = DMA_TCD_CSR_INTHALF_MASK, /*!< Enable interrupt while major count to…
Dfsl_ad_edma.c673 tcd->CSR |= DMA_TCD_CSR_INTHALF_MASK; in EDMA_AD_TcdEnableInterrupts()
697 tcd->CSR &= ~(uint16_t)DMA_TCD_CSR_INTHALF_MASK; in EDMA_AD_TcdDisableInterrupts()
Dfsl_edma.c701 tcd->CSR |= DMA_TCD_CSR_INTHALF_MASK; in EDMA_TcdEnableInterrupts()
725 tcd->CSR &= ~(uint16_t)DMA_TCD_CSR_INTHALF_MASK; in EDMA_TcdDisableInterrupts()
/hal_nxp-latest/s32/mcux/devices/S32K344/
DS32K344_device.h2828 #define DMA_TCD_CSR_INTHALF_MASK DMA_TCD_TCD0_CSR_INTHALF_MASK macro
/hal_nxp-latest/s32/mcux/devices/S32Z270/
DS32Z270_device.h2390 #define DMA_TCD_CSR_INTHALF_MASK EDMA3_TCD_CSR_INTHALF_MASK macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h4617 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
4623 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h4617 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
4623 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h4617 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
4623 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h4617 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
4623 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h6828 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
6834 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h6828 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
6834 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h6828 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
6834 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h6828 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
6834 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h6828 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
6834 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h6828 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
6834 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h7596 #define DMA_TCD_CSR_INTHALF_MASK (0x4U) macro
7602 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_CSR_INTHALF_SHIFT)) & DMA_TCD_CSR_INTHALF_MASK)

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