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Searched refs:DMA_TCD_ATTR_DSIZE_MASK (Results 1 – 25 of 93) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K118_DMA.h598 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
601 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
DS32K116_DMA.h598 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
601 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
DS32K148_DMA.h958 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
961 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
DS32K144W_DMA.h958 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
961 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
DS32K144_DMA.h958 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
961 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
DS32K142W_DMA.h958 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
961 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
DS32K142_DMA.h958 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
961 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
DS32K146_DMA.h958 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
961 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
/hal_nxp-latest/s32/mcux/devices/S32K344/
DS32K344_device.h2704 #define DMA_TCD_ATTR_DSIZE_MASK DMA_TCD_TCD0_ATTR_DSIZE_MASK macro
/hal_nxp-latest/s32/mcux/devices/S32Z270/
DS32Z270_device.h2244 #define DMA_TCD_ATTR_DSIZE_MASK EDMA3_TCD_ATTR_DSIZE_MASK macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h4408 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
4411 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h4408 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
4411 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h4408 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
4411 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h4408 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
4411 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h6619 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
6622 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h6619 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
6622 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h6619 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
6622 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h6619 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
6622 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h6619 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
6622 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h6619 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
6622 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h7387 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
7390 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h18165 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
18168 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
DMIMXRT735S_cm33_core1.h18203 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
18206 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h9556 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
9559 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h18203 #define DMA_TCD_ATTR_DSIZE_MASK (0x7U) macro
18206 … (((uint16_t)(((uint16_t)(x)) << DMA_TCD_ATTR_DSIZE_SHIFT)) & DMA_TCD_ATTR_DSIZE_MASK)

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