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Searched refs:DMA_INT_INT19_MASK (Results 1 – 25 of 33) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h8987 #define DMA_INT_INT19_MASK (0x80000U) macro
8993 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h8991 #define DMA_INT_INT19_MASK (0x80000U) macro
8997 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h6738 #define DMA_INT_INT19_MASK (0x80000U) macro
6744 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h6732 #define DMA_INT_INT19_MASK (0x80000U) macro
6738 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h6802 #define DMA_INT_INT19_MASK (0x80000U) macro
6808 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h6800 #define DMA_INT_INT19_MASK (0x80000U) macro
6806 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h8833 #define DMA_INT_INT19_MASK (0x80000U) macro
8839 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h8884 #define DMA_INT_INT19_MASK (0x80000U) macro
8890 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h8884 #define DMA_INT_INT19_MASK (0x80000U) macro
8890 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h4190 #define DMA_INT_INT19_MASK (0x80000U) macro
4196 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h4191 #define DMA_INT_INT19_MASK (0x80000U) macro
4197 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h12118 #define DMA_INT_INT19_MASK (0x80000U) macro
12124 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h13658 #define DMA_INT_INT19_MASK (0x80000U) macro
13664 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h13678 #define DMA_INT_INT19_MASK (0x80000U) macro
13684 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h14705 #define DMA_INT_INT19_MASK (0x80000U) macro
14711 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h15771 #define DMA_INT_INT19_MASK (0x80000U) macro
15777 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h15490 #define DMA_INT_INT19_MASK (0x80000U) macro
15496 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h15773 #define DMA_INT_INT19_MASK (0x80000U) macro
15779 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h16139 #define DMA_INT_INT19_MASK (0x80000U) macro
16145 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h17003 #define DMA_INT_INT19_MASK (0x80000U) macro
17009 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h16925 #define DMA_INT_INT19_MASK (0x80000U) macro
16931 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h27801 #define DMA_INT_INT19_MASK (0x80000U) macro
27807 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h27492 #define DMA_INT_INT19_MASK (0x80000U) macro
27498 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
DMIMXRT1165_cm4.h27489 #define DMA_INT_INT19_MASK (0x80000U) macro
27495 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h27804 #define DMA_INT_INT19_MASK (0x80000U) macro
27810 … (((uint32_t)(((uint32_t)(x)) << DMA_INT_INT19_SHIFT)) & DMA_INT_INT19_MASK)

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