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Searched refs:DMA_DLAST_SGA_DLASTSGA_MASK (Results 1 – 25 of 69) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h2379 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
2381 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h2383 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
2385 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h2287 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
2289 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h2403 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
2405 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h2541 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
2543 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h2967 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
2969 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h2893 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
2896 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h2969 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
2971 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h2968 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
2970 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h3328 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
3330 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h3166 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
3168 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F51212/
DMKV31F51212.h3170 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
3172 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h2405 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
2407 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h2725 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
2727 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/
DMKE17Z9.h2895 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
2898 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h2726 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
2728 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h2894 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
2897 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW22D5/
DMKW22D5.h2392 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
2394 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW24D5/
DMKW24D5.h2392 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
2394 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F25612/
DMK22F25612.h3172 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
3174 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F51212/
DMK22F51212.h3186 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
3188 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h4495 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
4497 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h3929 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
3931 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h3929 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
3931 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h5497 #define DMA_DLAST_SGA_DLASTSGA_MASK (0xFFFFFFFFU) macro
5499 … (((uint32_t)(((uint32_t)(x)) << DMA_DLAST_SGA_DLASTSGA_SHIFT)) & DMA_DLAST_SGA_DLASTSGA_MASK)

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