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Searched refs:DMA_DCHPRI5_ECP_MASK (Results 1 – 25 of 61) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h2329 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
2335 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h2698 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
2704 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h2637 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
2643 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h2700 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
2706 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h2699 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
2705 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h3116 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
3122 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h2786 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
2792 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F51212/
DMKV31F51212.h2790 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
2796 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h2482 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
2488 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/
DMKE17Z9.h2639 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
2645 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h2483 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
2489 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h2638 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
2644 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW22D5/
DMKW22D5.h2167 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
2169 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW24D5/
DMKW24D5.h2167 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
2169 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F25612/
DMK22F25612.h2792 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
2798 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F51212/
DMK22F51212.h2806 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
2812 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h4018 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
4024 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h3674 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
3680 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h3674 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
3680 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h5020 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
5026 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h5016 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
5022 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h6764 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
6770 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK24F12/
DMK24F12.h8879 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
8885 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h4562 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
4568 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)
DK32L3A60_cm0plus.h3815 #define DMA_DCHPRI5_ECP_MASK (0x80U) macro
3821 … (((uint8_t)(((uint8_t)(x)) << DMA_DCHPRI5_ECP_SHIFT)) & DMA_DCHPRI5_ECP_MASK)

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