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Searched refs:DMA_COMMON_INTENCLR_CLR5_MASK (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h9523 #define DMA_COMMON_INTENCLR_CLR5_MASK (0x20U) macro
9526 … (((uint32_t)(((uint32_t)(x)) << DMA_COMMON_INTENCLR_CLR5_SHIFT)) & DMA_COMMON_INTENCLR_CLR5_MASK)
DMIMXRT595S_cm33.h15909 #define DMA_COMMON_INTENCLR_CLR5_MASK (0x20U) macro
15912 … (((uint32_t)(((uint32_t)(x)) << DMA_COMMON_INTENCLR_CLR5_SHIFT)) & DMA_COMMON_INTENCLR_CLR5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h9128 #define DMA_COMMON_INTENCLR_CLR5_MASK (0x20U) macro
9131 … (((uint32_t)(((uint32_t)(x)) << DMA_COMMON_INTENCLR_CLR5_SHIFT)) & DMA_COMMON_INTENCLR_CLR5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h9128 #define DMA_COMMON_INTENCLR_CLR5_MASK (0x20U) macro
9131 … (((uint32_t)(((uint32_t)(x)) << DMA_COMMON_INTENCLR_CLR5_SHIFT)) & DMA_COMMON_INTENCLR_CLR5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h15905 #define DMA_COMMON_INTENCLR_CLR5_MASK (0x20U) macro
15908 … (((uint32_t)(((uint32_t)(x)) << DMA_COMMON_INTENCLR_CLR5_SHIFT)) & DMA_COMMON_INTENCLR_CLR5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h15908 #define DMA_COMMON_INTENCLR_CLR5_MASK (0x20U) macro
15911 … (((uint32_t)(((uint32_t)(x)) << DMA_COMMON_INTENCLR_CLR5_SHIFT)) & DMA_COMMON_INTENCLR_CLR5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h9127 #define DMA_COMMON_INTENCLR_CLR5_MASK (0x20U) macro
9130 … (((uint32_t)(((uint32_t)(x)) << DMA_COMMON_INTENCLR_CLR5_SHIFT)) & DMA_COMMON_INTENCLR_CLR5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/
DRW610.h25626 #define DMA_COMMON_INTENCLR_CLR5_MASK (0x20U) macro
25629 … (((uint32_t)(((uint32_t)(x)) << DMA_COMMON_INTENCLR_CLR5_SHIFT)) & DMA_COMMON_INTENCLR_CLR5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/
DRW612.h25626 #define DMA_COMMON_INTENCLR_CLR5_MASK (0x20U) macro
25629 … (((uint32_t)(((uint32_t)(x)) << DMA_COMMON_INTENCLR_CLR5_SHIFT)) & DMA_COMMON_INTENCLR_CLR5_MASK)