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Searched refs:DMA_COMMON_INTENCLR_CLR1_MASK (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h9503 #define DMA_COMMON_INTENCLR_CLR1_MASK (0x2U) macro
9506 … (((uint32_t)(((uint32_t)(x)) << DMA_COMMON_INTENCLR_CLR1_SHIFT)) & DMA_COMMON_INTENCLR_CLR1_MASK)
DMIMXRT595S_cm33.h15889 #define DMA_COMMON_INTENCLR_CLR1_MASK (0x2U) macro
15892 … (((uint32_t)(((uint32_t)(x)) << DMA_COMMON_INTENCLR_CLR1_SHIFT)) & DMA_COMMON_INTENCLR_CLR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h9108 #define DMA_COMMON_INTENCLR_CLR1_MASK (0x2U) macro
9111 … (((uint32_t)(((uint32_t)(x)) << DMA_COMMON_INTENCLR_CLR1_SHIFT)) & DMA_COMMON_INTENCLR_CLR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h9108 #define DMA_COMMON_INTENCLR_CLR1_MASK (0x2U) macro
9111 … (((uint32_t)(((uint32_t)(x)) << DMA_COMMON_INTENCLR_CLR1_SHIFT)) & DMA_COMMON_INTENCLR_CLR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h15885 #define DMA_COMMON_INTENCLR_CLR1_MASK (0x2U) macro
15888 … (((uint32_t)(((uint32_t)(x)) << DMA_COMMON_INTENCLR_CLR1_SHIFT)) & DMA_COMMON_INTENCLR_CLR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h15888 #define DMA_COMMON_INTENCLR_CLR1_MASK (0x2U) macro
15891 … (((uint32_t)(((uint32_t)(x)) << DMA_COMMON_INTENCLR_CLR1_SHIFT)) & DMA_COMMON_INTENCLR_CLR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h9107 #define DMA_COMMON_INTENCLR_CLR1_MASK (0x2U) macro
9110 … (((uint32_t)(((uint32_t)(x)) << DMA_COMMON_INTENCLR_CLR1_SHIFT)) & DMA_COMMON_INTENCLR_CLR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/
DRW610.h25606 #define DMA_COMMON_INTENCLR_CLR1_MASK (0x2U) macro
25609 … (((uint32_t)(((uint32_t)(x)) << DMA_COMMON_INTENCLR_CLR1_SHIFT)) & DMA_COMMON_INTENCLR_CLR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/
DRW612.h25606 #define DMA_COMMON_INTENCLR_CLR1_MASK (0x2U) macro
25609 … (((uint32_t)(((uint32_t)(x)) << DMA_COMMON_INTENCLR_CLR1_SHIFT)) & DMA_COMMON_INTENCLR_CLR1_MASK)