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Searched refs:DMA_COMMON_ENABLESET_ENABLE7_MASK (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h7694 #define DMA_COMMON_ENABLESET_ENABLE7_MASK (0x80U) macro
7700 …t32_t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET_ENABLE7_SHIFT)) & DMA_COMMON_ENABLESET_ENABLE7_MASK)
DMIMXRT595S_cm33.h14080 #define DMA_COMMON_ENABLESET_ENABLE7_MASK (0x80U) macro
14086 …t32_t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET_ENABLE7_SHIFT)) & DMA_COMMON_ENABLESET_ENABLE7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h6579 #define DMA_COMMON_ENABLESET_ENABLE7_MASK (0x80U) macro
6585 …t32_t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET_ENABLE7_SHIFT)) & DMA_COMMON_ENABLESET_ENABLE7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h6579 #define DMA_COMMON_ENABLESET_ENABLE7_MASK (0x80U) macro
6585 …t32_t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET_ENABLE7_SHIFT)) & DMA_COMMON_ENABLESET_ENABLE7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h14076 #define DMA_COMMON_ENABLESET_ENABLE7_MASK (0x80U) macro
14082 …t32_t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET_ENABLE7_SHIFT)) & DMA_COMMON_ENABLESET_ENABLE7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h14079 #define DMA_COMMON_ENABLESET_ENABLE7_MASK (0x80U) macro
14085 …t32_t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET_ENABLE7_SHIFT)) & DMA_COMMON_ENABLESET_ENABLE7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h6578 #define DMA_COMMON_ENABLESET_ENABLE7_MASK (0x80U) macro
6584 …t32_t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET_ENABLE7_SHIFT)) & DMA_COMMON_ENABLESET_ENABLE7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/
DRW610.h23989 #define DMA_COMMON_ENABLESET_ENABLE7_MASK (0x80U) macro
23995 …t32_t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET_ENABLE7_SHIFT)) & DMA_COMMON_ENABLESET_ENABLE7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/
DRW612.h23989 #define DMA_COMMON_ENABLESET_ENABLE7_MASK (0x80U) macro
23995 …t32_t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET_ENABLE7_SHIFT)) & DMA_COMMON_ENABLESET_ENABLE7_MASK)