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Searched refs:DMA_COMMON_ENABLESET1_ENABLE32_MASK (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h5846 #define DMA_COMMON_ENABLESET1_ENABLE32_MASK (0x1U) macro
5852 …t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET1_ENABLE32_SHIFT)) & DMA_COMMON_ENABLESET1_ENABLE32_MASK)
DMIMXRT685S_cm33.h11686 #define DMA_COMMON_ENABLESET1_ENABLE32_MASK (0x1U) macro
11692 …t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET1_ENABLE32_SHIFT)) & DMA_COMMON_ENABLESET1_ENABLE32_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h11686 #define DMA_COMMON_ENABLESET1_ENABLE32_MASK (0x1U) macro
11692 …t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET1_ENABLE32_SHIFT)) & DMA_COMMON_ENABLESET1_ENABLE32_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h7901 #define DMA_COMMON_ENABLESET1_ENABLE32_MASK (0x1U) macro
7907 …t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET1_ENABLE32_SHIFT)) & DMA_COMMON_ENABLESET1_ENABLE32_MASK)
DMIMXRT595S_cm33.h14287 #define DMA_COMMON_ENABLESET1_ENABLE32_MASK (0x1U) macro
14293 …t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET1_ENABLE32_SHIFT)) & DMA_COMMON_ENABLESET1_ENABLE32_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h6786 #define DMA_COMMON_ENABLESET1_ENABLE32_MASK (0x1U) macro
6792 …t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET1_ENABLE32_SHIFT)) & DMA_COMMON_ENABLESET1_ENABLE32_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h6786 #define DMA_COMMON_ENABLESET1_ENABLE32_MASK (0x1U) macro
6792 …t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET1_ENABLE32_SHIFT)) & DMA_COMMON_ENABLESET1_ENABLE32_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h14283 #define DMA_COMMON_ENABLESET1_ENABLE32_MASK (0x1U) macro
14289 …t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET1_ENABLE32_SHIFT)) & DMA_COMMON_ENABLESET1_ENABLE32_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h14286 #define DMA_COMMON_ENABLESET1_ENABLE32_MASK (0x1U) macro
14292 …t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET1_ENABLE32_SHIFT)) & DMA_COMMON_ENABLESET1_ENABLE32_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h6785 #define DMA_COMMON_ENABLESET1_ENABLE32_MASK (0x1U) macro
6791 …t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET1_ENABLE32_SHIFT)) & DMA_COMMON_ENABLESET1_ENABLE32_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/
DRW610.h24196 #define DMA_COMMON_ENABLESET1_ENABLE32_MASK (0x1U) macro
24202 …t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET1_ENABLE32_SHIFT)) & DMA_COMMON_ENABLESET1_ENABLE32_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/
DRW612.h24196 #define DMA_COMMON_ENABLESET1_ENABLE32_MASK (0x1U) macro
24202 …t)(((uint32_t)(x)) << DMA_COMMON_ENABLESET1_ENABLE32_SHIFT)) & DMA_COMMON_ENABLESET1_ENABLE32_MASK)