Home
last modified time | relevance | path

Searched refs:DMA_COMMON_ENABLECLR_CLR31_MASK (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h8196 #define DMA_COMMON_ENABLECLR_CLR31_MASK (0x80000000U) macro
8202 …(uint32_t)(((uint32_t)(x)) << DMA_COMMON_ENABLECLR_CLR31_SHIFT)) & DMA_COMMON_ENABLECLR_CLR31_MASK)
DMIMXRT595S_cm33.h14582 #define DMA_COMMON_ENABLECLR_CLR31_MASK (0x80000000U) macro
14588 …(uint32_t)(((uint32_t)(x)) << DMA_COMMON_ENABLECLR_CLR31_SHIFT)) & DMA_COMMON_ENABLECLR_CLR31_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h7201 #define DMA_COMMON_ENABLECLR_CLR31_MASK (0x80000000U) macro
7207 …(uint32_t)(((uint32_t)(x)) << DMA_COMMON_ENABLECLR_CLR31_SHIFT)) & DMA_COMMON_ENABLECLR_CLR31_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h7201 #define DMA_COMMON_ENABLECLR_CLR31_MASK (0x80000000U) macro
7207 …(uint32_t)(((uint32_t)(x)) << DMA_COMMON_ENABLECLR_CLR31_SHIFT)) & DMA_COMMON_ENABLECLR_CLR31_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h14578 #define DMA_COMMON_ENABLECLR_CLR31_MASK (0x80000000U) macro
14584 …(uint32_t)(((uint32_t)(x)) << DMA_COMMON_ENABLECLR_CLR31_SHIFT)) & DMA_COMMON_ENABLECLR_CLR31_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h14581 #define DMA_COMMON_ENABLECLR_CLR31_MASK (0x80000000U) macro
14587 …(uint32_t)(((uint32_t)(x)) << DMA_COMMON_ENABLECLR_CLR31_SHIFT)) & DMA_COMMON_ENABLECLR_CLR31_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h7200 #define DMA_COMMON_ENABLECLR_CLR31_MASK (0x80000000U) macro
7206 …(uint32_t)(((uint32_t)(x)) << DMA_COMMON_ENABLECLR_CLR31_SHIFT)) & DMA_COMMON_ENABLECLR_CLR31_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/
DRW610.h24459 #define DMA_COMMON_ENABLECLR_CLR31_MASK (0x80000000U) macro
24465 …(uint32_t)(((uint32_t)(x)) << DMA_COMMON_ENABLECLR_CLR31_SHIFT)) & DMA_COMMON_ENABLECLR_CLR31_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/
DRW612.h24459 #define DMA_COMMON_ENABLECLR_CLR31_MASK (0x80000000U) macro
24465 …(uint32_t)(((uint32_t)(x)) << DMA_COMMON_ENABLECLR_CLR31_SHIFT)) & DMA_COMMON_ENABLECLR_CLR31_MASK)