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Searched refs:DMA_CH_ES_SOE_MASK (Results 1 – 25 of 85) sorted by relevance

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/hal_nxp-latest/s32/mcux/devices/S32K344/
DS32K344_device.h2628 #define DMA_CH_ES_SOE_MASK DMA_TCD_CH0_ES_SOE_MASK macro
/hal_nxp-latest/s32/mcux/devices/S32Z270/
DS32Z270_device.h2155 #define DMA_CH_ES_SOE_MASK EDMA3_TCD_CH_ES_SOE_MASK macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h4270 #define DMA_CH_ES_SOE_MASK (0x40U) macro
4276 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h4270 #define DMA_CH_ES_SOE_MASK (0x40U) macro
4276 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h4270 #define DMA_CH_ES_SOE_MASK (0x40U) macro
4276 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h4270 #define DMA_CH_ES_SOE_MASK (0x40U) macro
4276 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h6481 #define DMA_CH_ES_SOE_MASK (0x40U) macro
6487 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h6481 #define DMA_CH_ES_SOE_MASK (0x40U) macro
6487 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h6481 #define DMA_CH_ES_SOE_MASK (0x40U) macro
6487 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h6481 #define DMA_CH_ES_SOE_MASK (0x40U) macro
6487 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h6481 #define DMA_CH_ES_SOE_MASK (0x40U) macro
6487 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h6481 #define DMA_CH_ES_SOE_MASK (0x40U) macro
6487 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h7236 #define DMA_CH_ES_SOE_MASK (0x40U) macro
7242 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h18019 #define DMA_CH_ES_SOE_MASK (0x40U) macro
18025 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
DMIMXRT735S_cm33_core1.h18057 #define DMA_CH_ES_SOE_MASK (0x40U) macro
18063 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h9405 #define DMA_CH_ES_SOE_MASK (0x40U) macro
9411 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h18057 #define DMA_CH_ES_SOE_MASK (0x40U) macro
18063 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
DMIMXRT758S_hifi1.h18019 #define DMA_CH_ES_SOE_MASK (0x40U) macro
18025 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h12636 #define DMA_CH_ES_SOE_MASK (0x40U) macro
12642 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h12606 #define DMA_CH_ES_SOE_MASK (0x40U) macro
12612 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h18019 #define DMA_CH_ES_SOE_MASK (0x40U) macro
18025 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
DMIMXRT798S_cm33_core1.h18057 #define DMA_CH_ES_SOE_MASK (0x40U) macro
18063 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h9886 #define DMA_CH_ES_SOE_MASK (0x40U) macro
9892 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
DMCXW727C_cm33_core1.h18240 #define DMA_CH_ES_SOE_MASK (0x40U) macro
18246 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h14920 #define DMA_CH_ES_SOE_MASK (0x40U) macro
14926 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_ES_SOE_SHIFT)) & DMA_CH_ES_SOE_MASK)

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