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Searched refs:DMA_CH_CSR_ACTIVE_MASK (Results 1 – 25 of 87) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/edma4/
Dfsl_edma.c1914 if (((handle->channelBase->CH_CSR & DMA_CH_CSR_ACTIVE_MASK) != 0U) || in EDMA_SubmitTransferTCD()
2102 if (((handle->channelBase->CH_CSR & DMA_CH_CSR_ACTIVE_MASK) != 0U) || in EDMA_SubmitTransfer()
2294 if (((handle->channelBase->CH_CSR & DMA_CH_CSR_ACTIVE_MASK) != 0U) || in EDMA_SubmitLoopTransfer()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9352/drivers/edma4/
Dfsl_edma.c1921 if (((handle->channelBase->CH_CSR & DMA_CH_CSR_ACTIVE_MASK) != 0U) || in EDMA_SubmitTransferTCD()
2109 if (((handle->channelBase->CH_CSR & DMA_CH_CSR_ACTIVE_MASK) != 0U) || in EDMA_SubmitTransfer()
2301 if (((handle->channelBase->CH_CSR & DMA_CH_CSR_ACTIVE_MASK) != 0U) || in EDMA_SubmitLoopTransfer()
/hal_nxp-latest/s32/mcux/devices/S32K344/
DS32K344_device.h2596 #define DMA_CH_CSR_ACTIVE_MASK DMA_TCD_CH0_CSR_ACTIVE_MASK macro
/hal_nxp-latest/s32/mcux/devices/S32Z270/
DS32Z270_device.h2116 #define DMA_CH_CSR_ACTIVE_MASK EDMA3_TCD_CH_CSR_ACTIVE_MASK macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h4210 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
4213 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h4210 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
4213 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h4210 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
4213 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h4210 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
4213 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h6421 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
6424 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h6421 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
6424 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h6421 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
6424 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h6421 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
6424 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h6421 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
6424 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h6421 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
6424 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h7176 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
7179 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h17959 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
17962 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
DMIMXRT735S_cm33_core1.h17997 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
18000 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h9345 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
9348 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h17997 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
18000 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
DMIMXRT758S_hifi1.h17959 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
17962 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h12576 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
12579 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h12546 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
12549 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h17959 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
17962 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
DMIMXRT798S_cm33_core1.h17997 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
18000 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h9826 #define DMA_CH_CSR_ACTIVE_MASK (0x80000000U) macro
9829 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_ACTIVE_SHIFT)) & DMA_CH_CSR_ACTIVE_MASK)

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