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Searched refs:DMAMUX_CHCFG_TRIG_MASK (Results 1 – 25 of 101) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/dmamux/
Dfsl_dmamux.h134 base->CHCFG[channel] |= DMAMUX_CHCFG_TRIG_MASK; in DMAMUX_EnablePeriodTrigger()
150 base->CHCFG[channel] &= ~DMAMUX_CHCFG_TRIG_MASK; in DMAMUX_DisablePeriodTrigger()
152 base->CHCFG[channel] &= ~(uint8_t)DMAMUX_CHCFG_TRIG_MASK; in DMAMUX_DisablePeriodTrigger()
/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K144W_DMAMUX.h109 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
112 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
DS32K148_DMAMUX.h109 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
112 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
DS32K116_DMAMUX.h109 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
112 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
DS32K118_DMAMUX.h109 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
112 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
DS32K142W_DMAMUX.h109 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
112 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
DS32K146_DMAMUX.h109 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
112 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
DS32K142_DMAMUX.h109 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
112 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
DS32K144_DMAMUX.h109 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
112 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_DMAMUX.h113 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
116 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL17Z644/
DMKL17Z644.h1628 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
1634 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC141/
DMCXC141.h1807 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
1814 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC142/
DMCXC142.h1805 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
1812 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/
DMKL25Z4.h1027 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
1029 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
/hal_nxp-latest/s32/mcux/devices/S32Z270/
DS32Z270_device.h2469 #define DMAMUX_CHCFG_TRIG_MASK DMAMUX_CHCONF_TRIG_MASK macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC242/
DMCXC242.h1807 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
1814 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL27Z644/
DMKL27Z644.h1637 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
1643 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/
DMCXC144.h1665 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
1672 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC143/
DMCXC143.h1665 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
1672 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h2577 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
2583 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC243/
DMCXC243.h1663 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
1670 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/
DMCXC244.h1665 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
1672 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h2582 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
2588 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h2610 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
2616 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM14ZA5/
DMKM14ZA5.h4064 #define DMAMUX_CHCFG_TRIG_MASK (0x40U) macro
4071 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_TRIG_SHIFT)) & DMAMUX_CHCFG_TRIG_MASK)

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