Home
last modified time | relevance | path

Searched refs:DMAMUX_CHCFG_ENBL_MASK (Results 1 – 25 of 104) sorted by relevance

12345

/hal_nxp-latest/mcux/mcux-sdk/drivers/dmamux/
Dfsl_dmamux.h79 base->CHCFG[channel] |= DMAMUX_CHCFG_ENBL_MASK; in DMAMUX_EnableChannel()
96 base->CHCFG[channel] &= ~DMAMUX_CHCFG_ENBL_MASK; in DMAMUX_DisableChannel()
98 base->CHCFG[channel] &= ~(uint8_t)DMAMUX_CHCFG_ENBL_MASK; in DMAMUX_DisableChannel()
/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K144W_DMAMUX.h114 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
117 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
DS32K148_DMAMUX.h114 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
117 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
DS32K116_DMAMUX.h114 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
117 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
DS32K118_DMAMUX.h114 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
117 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
DS32K142W_DMAMUX.h114 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
117 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
DS32K146_DMAMUX.h114 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
117 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
DS32K142_DMAMUX.h114 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
117 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
DS32K144_DMAMUX.h114 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
117 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_DMAMUX.h118 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
121 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL17Z644/
DMKL17Z644.h1635 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
1641 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC141/
DMCXC141.h1816 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
1823 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC142/
DMCXC142.h1814 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
1821 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/
DMKL25Z4.h1030 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
1032 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
/hal_nxp-latest/s32/mcux/devices/S32Z270/
DS32Z270_device.h2474 #define DMAMUX_CHCFG_ENBL_MASK DMAMUX_CHCONF_ENBL_MASK macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC242/
DMCXC242.h1816 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
1823 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL27Z644/
DMKL27Z644.h1644 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
1650 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/
DMCXC144.h1674 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
1681 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC143/
DMCXC143.h1674 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
1681 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h2584 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
2590 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC243/
DMCXC243.h1672 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
1679 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/
DMCXC244.h1674 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
1681 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h2589 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
2595 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h2492 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
2498 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h2617 #define DMAMUX_CHCFG_ENBL_MASK (0x80U) macro
2623 … (((uint8_t)(((uint8_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)

12345