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Searched refs:DMA1_TRIG14_PIO1_5 (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-latest/dts/nxp/lpc/
DLPC55S06JHI48-pinctrl.h1780 #define DMA1_TRIG14_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S06JBD64-pinctrl.h2251 #define DMA1_TRIG14_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S16JBD100-pinctrl.h2312 #define DMA1_TRIG14_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S28JBD100-pinctrl.h2328 #define DMA1_TRIG14_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S28JEV98-pinctrl.h2328 #define DMA1_TRIG14_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S69JEV98-pinctrl.h2328 #define DMA1_TRIG14_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S69JBD100-pinctrl.h2328 #define DMA1_TRIG14_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S16JEV98-pinctrl.h2312 #define DMA1_TRIG14_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S36JBD100-pinctrl.h4436 #define DMA1_TRIG14_PIO1_5 IOCON_MUX(37, IOCON_TYPE_A, 0) /* PIO1_5 */ macro
/hal_nxp-latest/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h2794 #define DMA1_TRIG14_PIO1_5 IOPCTL_MUX(37, 0) /* PIO1_5 */ macro
DMIMXRT595SFAWC-pinctrl.h3299 #define DMA1_TRIG14_PIO1_5 IOPCTL_MUX(37, 0) /* PIO1_5 */ macro
DMIMXRT685SFVKB-pinctrl.h3345 #define DMA1_TRIG14_PIO1_5 IOPCTL_MUX(37, 0) /* PIO1_5 */ macro
DMIMXRT595SFFOC-pinctrl.h3301 #define DMA1_TRIG14_PIO1_5 IOPCTL_MUX(37, 0) /* PIO1_5 */ macro
DMIMXRT685SFFOB-pinctrl.h3345 #define DMA1_TRIG14_PIO1_5 IOPCTL_MUX(37, 0) /* PIO1_5 */ macro