Home
last modified time | relevance | path

Searched refs:DMA1_TRIG10_PIO1_5 (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-latest/dts/nxp/lpc/
DLPC55S06JHI48-pinctrl.h1776 #define DMA1_TRIG10_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S06JBD64-pinctrl.h2247 #define DMA1_TRIG10_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S16JBD100-pinctrl.h2308 #define DMA1_TRIG10_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S28JBD100-pinctrl.h2324 #define DMA1_TRIG10_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S28JEV98-pinctrl.h2324 #define DMA1_TRIG10_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S69JEV98-pinctrl.h2324 #define DMA1_TRIG10_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S69JBD100-pinctrl.h2324 #define DMA1_TRIG10_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S16JEV98-pinctrl.h2308 #define DMA1_TRIG10_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S36JBD100-pinctrl.h4432 #define DMA1_TRIG10_PIO1_5 IOCON_MUX(37, IOCON_TYPE_A, 0) /* PIO1_5 */ macro
/hal_nxp-latest/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h2790 #define DMA1_TRIG10_PIO1_5 IOPCTL_MUX(37, 0) /* PIO1_5 */ macro
DMIMXRT595SFAWC-pinctrl.h3295 #define DMA1_TRIG10_PIO1_5 IOPCTL_MUX(37, 0) /* PIO1_5 */ macro
DMIMXRT685SFVKB-pinctrl.h3341 #define DMA1_TRIG10_PIO1_5 IOPCTL_MUX(37, 0) /* PIO1_5 */ macro
DMIMXRT595SFFOC-pinctrl.h3297 #define DMA1_TRIG10_PIO1_5 IOPCTL_MUX(37, 0) /* PIO1_5 */ macro
DMIMXRT685SFFOB-pinctrl.h3341 #define DMA1_TRIG10_PIO1_5 IOPCTL_MUX(37, 0) /* PIO1_5 */ macro