Home
last modified time | relevance | path

Searched refs:DIGTMP_PPR_TPP7_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h11933 #define DIGTMP_PPR_TPP7_MASK (0x80U) macro
11939 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPP7_SHIFT)) & DIGTMP_PPR_TPP7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h11903 #define DIGTMP_PPR_TPP7_MASK (0x80U) macro
11909 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPP7_SHIFT)) & DIGTMP_PPR_TPP7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h14217 #define DIGTMP_PPR_TPP7_MASK (0x80U) macro
14223 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPP7_SHIFT)) & DIGTMP_PPR_TPP7_MASK)
DMCXN546_cm33_core1.h14217 #define DIGTMP_PPR_TPP7_MASK (0x80U) macro
14223 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPP7_SHIFT)) & DIGTMP_PPR_TPP7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h14217 #define DIGTMP_PPR_TPP7_MASK (0x80U) macro
14223 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPP7_SHIFT)) & DIGTMP_PPR_TPP7_MASK)
DMCXN547_cm33_core1.h14217 #define DIGTMP_PPR_TPP7_MASK (0x80U) macro
14223 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPP7_SHIFT)) & DIGTMP_PPR_TPP7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h14263 #define DIGTMP_PPR_TPP7_MASK (0x80U) macro
14269 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPP7_SHIFT)) & DIGTMP_PPR_TPP7_MASK)
DMCXN947_cm33_core0.h14263 #define DIGTMP_PPR_TPP7_MASK (0x80U) macro
14269 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPP7_SHIFT)) & DIGTMP_PPR_TPP7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h14263 #define DIGTMP_PPR_TPP7_MASK (0x80U) macro
14269 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPP7_SHIFT)) & DIGTMP_PPR_TPP7_MASK)
DMCXN946_cm33_core1.h14263 #define DIGTMP_PPR_TPP7_MASK (0x80U) macro
14269 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPP7_SHIFT)) & DIGTMP_PPR_TPP7_MASK)