Home
last modified time | relevance | path

Searched refs:DIGTMP_ATR_ATP_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h12014 #define DIGTMP_ATR_ATP_MASK (0xFFFF0000U) macro
12017 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_ATR_ATP_SHIFT)) & DIGTMP_ATR_ATP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h11984 #define DIGTMP_ATR_ATP_MASK (0xFFFF0000U) macro
11987 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_ATR_ATP_SHIFT)) & DIGTMP_ATR_ATP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h14298 #define DIGTMP_ATR_ATP_MASK (0xFFFF0000U) macro
14301 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_ATR_ATP_SHIFT)) & DIGTMP_ATR_ATP_MASK)
DMCXN546_cm33_core1.h14298 #define DIGTMP_ATR_ATP_MASK (0xFFFF0000U) macro
14301 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_ATR_ATP_SHIFT)) & DIGTMP_ATR_ATP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h14298 #define DIGTMP_ATR_ATP_MASK (0xFFFF0000U) macro
14301 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_ATR_ATP_SHIFT)) & DIGTMP_ATR_ATP_MASK)
DMCXN547_cm33_core1.h14298 #define DIGTMP_ATR_ATP_MASK (0xFFFF0000U) macro
14301 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_ATR_ATP_SHIFT)) & DIGTMP_ATR_ATP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h14344 #define DIGTMP_ATR_ATP_MASK (0xFFFF0000U) macro
14347 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_ATR_ATP_SHIFT)) & DIGTMP_ATR_ATP_MASK)
DMCXN947_cm33_core0.h14344 #define DIGTMP_ATR_ATP_MASK (0xFFFF0000U) macro
14347 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_ATR_ATP_SHIFT)) & DIGTMP_ATR_ATP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h14344 #define DIGTMP_ATR_ATP_MASK (0xFFFF0000U) macro
14347 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_ATR_ATP_SHIFT)) & DIGTMP_ATR_ATP_MASK)
DMCXN946_cm33_core1.h14344 #define DIGTMP_ATR_ATP_MASK (0xFFFF0000U) macro
14347 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_ATR_ATP_SHIFT)) & DIGTMP_ATR_ATP_MASK)