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Searched refs:DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK (Results 1 – 15 of 15) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX2/
DMIMX8QX2_cm4.h37977 #define DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK (0xC000000U) macro
37981 …2_t)(((uint32_t)(x)) << DDRPHY_DX8SL5OSC_GATEDXDDRCLK_SHIFT)) & DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX1/
DMIMX8QX1_cm4.h37977 #define DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK (0xC000000U) macro
37981 …2_t)(((uint32_t)(x)) << DDRPHY_DX8SL5OSC_GATEDXDDRCLK_SHIFT)) & DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX1/
DMIMX8DX1_cm4.h37977 #define DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK (0xC000000U) macro
37981 …2_t)(((uint32_t)(x)) << DDRPHY_DX8SL5OSC_GATEDXDDRCLK_SHIFT)) & DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX2/
DMIMX8DX2_cm4.h37977 #define DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK (0xC000000U) macro
37981 …2_t)(((uint32_t)(x)) << DDRPHY_DX8SL5OSC_GATEDXDDRCLK_SHIFT)) & DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/
DMIMX8QX3_cm4.h37975 #define DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK (0xC000000U) macro
37979 …2_t)(((uint32_t)(x)) << DDRPHY_DX8SL5OSC_GATEDXDDRCLK_SHIFT)) & DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/
DMIMX8DX4_cm4.h37975 #define DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK (0xC000000U) macro
37979 …2_t)(((uint32_t)(x)) << DDRPHY_DX8SL5OSC_GATEDXDDRCLK_SHIFT)) & DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/
DMIMX8DX3_cm4.h37975 #define DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK (0xC000000U) macro
37979 …2_t)(((uint32_t)(x)) << DDRPHY_DX8SL5OSC_GATEDXDDRCLK_SHIFT)) & DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/
DMIMX8QX6_dsp.h38569 #define DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK (0xC000000U) macro
38572 …2_t)(((uint32_t)(x)) << DDRPHY_DX8SL5OSC_GATEDXDDRCLK_SHIFT)) & DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK)
DMIMX8QX6_cm4.h37977 #define DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK (0xC000000U) macro
37981 …2_t)(((uint32_t)(x)) << DDRPHY_DX8SL5OSC_GATEDXDDRCLK_SHIFT)) & DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/
DMIMX8DX6_cm4.h37977 #define DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK (0xC000000U) macro
37981 …2_t)(((uint32_t)(x)) << DDRPHY_DX8SL5OSC_GATEDXDDRCLK_SHIFT)) & DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/
DMIMX8QX5_cm4.h37976 #define DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK (0xC000000U) macro
37980 …2_t)(((uint32_t)(x)) << DDRPHY_DX8SL5OSC_GATEDXDDRCLK_SHIFT)) & DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/
DMIMX8DX5_cm4.h37977 #define DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK (0xC000000U) macro
37981 …2_t)(((uint32_t)(x)) << DDRPHY_DX8SL5OSC_GATEDXDDRCLK_SHIFT)) & DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/
DMIMX8UX6_cm4.h37978 #define DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK (0xC000000U) macro
37982 …2_t)(((uint32_t)(x)) << DDRPHY_DX8SL5OSC_GATEDXDDRCLK_SHIFT)) & DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/
DMIMX8UX5_cm4.h37978 #define DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK (0xC000000U) macro
37982 …2_t)(((uint32_t)(x)) << DDRPHY_DX8SL5OSC_GATEDXDDRCLK_SHIFT)) & DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/
DMIMX8QX4_cm4.h37974 #define DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK (0xC000000U) macro
37978 …2_t)(((uint32_t)(x)) << DDRPHY_DX8SL5OSC_GATEDXDDRCLK_SHIFT)) & DDRPHY_DX8SL5OSC_GATEDXDDRCLK_MASK)