Home
last modified time | relevance | path

Searched refs:DDRPHY_DX4GSR2_REERR_MASK (Results 1 – 15 of 15) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX2/
DMIMX8QX2_cm4.h28250 #define DDRPHY_DX4GSR2_REERR_MASK (0x10U) macro
28254 … (((uint32_t)(((uint32_t)(x)) << DDRPHY_DX4GSR2_REERR_SHIFT)) & DDRPHY_DX4GSR2_REERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX1/
DMIMX8QX1_cm4.h28250 #define DDRPHY_DX4GSR2_REERR_MASK (0x10U) macro
28254 … (((uint32_t)(((uint32_t)(x)) << DDRPHY_DX4GSR2_REERR_SHIFT)) & DDRPHY_DX4GSR2_REERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX1/
DMIMX8DX1_cm4.h28250 #define DDRPHY_DX4GSR2_REERR_MASK (0x10U) macro
28254 … (((uint32_t)(((uint32_t)(x)) << DDRPHY_DX4GSR2_REERR_SHIFT)) & DDRPHY_DX4GSR2_REERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX2/
DMIMX8DX2_cm4.h28250 #define DDRPHY_DX4GSR2_REERR_MASK (0x10U) macro
28254 … (((uint32_t)(((uint32_t)(x)) << DDRPHY_DX4GSR2_REERR_SHIFT)) & DDRPHY_DX4GSR2_REERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/
DMIMX8QX3_cm4.h28248 #define DDRPHY_DX4GSR2_REERR_MASK (0x10U) macro
28252 … (((uint32_t)(((uint32_t)(x)) << DDRPHY_DX4GSR2_REERR_SHIFT)) & DDRPHY_DX4GSR2_REERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/
DMIMX8DX4_cm4.h28248 #define DDRPHY_DX4GSR2_REERR_MASK (0x10U) macro
28252 … (((uint32_t)(((uint32_t)(x)) << DDRPHY_DX4GSR2_REERR_SHIFT)) & DDRPHY_DX4GSR2_REERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/
DMIMX8DX3_cm4.h28248 #define DDRPHY_DX4GSR2_REERR_MASK (0x10U) macro
28252 … (((uint32_t)(((uint32_t)(x)) << DDRPHY_DX4GSR2_REERR_SHIFT)) & DDRPHY_DX4GSR2_REERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/
DMIMX8QX6_dsp.h28842 #define DDRPHY_DX4GSR2_REERR_MASK (0x10U) macro
28845 … (((uint32_t)(((uint32_t)(x)) << DDRPHY_DX4GSR2_REERR_SHIFT)) & DDRPHY_DX4GSR2_REERR_MASK)
DMIMX8QX6_cm4.h28250 #define DDRPHY_DX4GSR2_REERR_MASK (0x10U) macro
28254 … (((uint32_t)(((uint32_t)(x)) << DDRPHY_DX4GSR2_REERR_SHIFT)) & DDRPHY_DX4GSR2_REERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/
DMIMX8DX6_cm4.h28250 #define DDRPHY_DX4GSR2_REERR_MASK (0x10U) macro
28254 … (((uint32_t)(((uint32_t)(x)) << DDRPHY_DX4GSR2_REERR_SHIFT)) & DDRPHY_DX4GSR2_REERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/
DMIMX8QX5_cm4.h28249 #define DDRPHY_DX4GSR2_REERR_MASK (0x10U) macro
28253 … (((uint32_t)(((uint32_t)(x)) << DDRPHY_DX4GSR2_REERR_SHIFT)) & DDRPHY_DX4GSR2_REERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/
DMIMX8DX5_cm4.h28250 #define DDRPHY_DX4GSR2_REERR_MASK (0x10U) macro
28254 … (((uint32_t)(((uint32_t)(x)) << DDRPHY_DX4GSR2_REERR_SHIFT)) & DDRPHY_DX4GSR2_REERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/
DMIMX8UX6_cm4.h28251 #define DDRPHY_DX4GSR2_REERR_MASK (0x10U) macro
28255 … (((uint32_t)(((uint32_t)(x)) << DDRPHY_DX4GSR2_REERR_SHIFT)) & DDRPHY_DX4GSR2_REERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/
DMIMX8UX5_cm4.h28251 #define DDRPHY_DX4GSR2_REERR_MASK (0x10U) macro
28255 … (((uint32_t)(((uint32_t)(x)) << DDRPHY_DX4GSR2_REERR_SHIFT)) & DDRPHY_DX4GSR2_REERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/
DMIMX8QX4_cm4.h28247 #define DDRPHY_DX4GSR2_REERR_MASK (0x10U) macro
28251 … (((uint32_t)(((uint32_t)(x)) << DDRPHY_DX4GSR2_REERR_SHIFT)) & DDRPHY_DX4GSR2_REERR_MASK)