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Searched refs:DDRPHY_ACIOCR2_ACOECLKGATE0 (Results 1 – 15 of 15) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX2/
DMIMX8QX2_cm4.h18106 #define DDRPHY_ACIOCR2_ACOECLKGATE0(x) (((uint32_t)(((uint32_t)(x)) << DDRPHY_ACIOCR2_ACO… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX1/
DMIMX8QX1_cm4.h18106 #define DDRPHY_ACIOCR2_ACOECLKGATE0(x) (((uint32_t)(((uint32_t)(x)) << DDRPHY_ACIOCR2_ACO… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX1/
DMIMX8DX1_cm4.h18106 #define DDRPHY_ACIOCR2_ACOECLKGATE0(x) (((uint32_t)(((uint32_t)(x)) << DDRPHY_ACIOCR2_ACO… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX2/
DMIMX8DX2_cm4.h18106 #define DDRPHY_ACIOCR2_ACOECLKGATE0(x) (((uint32_t)(((uint32_t)(x)) << DDRPHY_ACIOCR2_ACO… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/
DMIMX8QX3_cm4.h18104 #define DDRPHY_ACIOCR2_ACOECLKGATE0(x) (((uint32_t)(((uint32_t)(x)) << DDRPHY_ACIOCR2_ACO… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/
DMIMX8DX4_cm4.h18104 #define DDRPHY_ACIOCR2_ACOECLKGATE0(x) (((uint32_t)(((uint32_t)(x)) << DDRPHY_ACIOCR2_ACO… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/
DMIMX8DX3_cm4.h18104 #define DDRPHY_ACIOCR2_ACOECLKGATE0(x) (((uint32_t)(((uint32_t)(x)) << DDRPHY_ACIOCR2_ACO… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/
DMIMX8QX6_dsp.h18697 #define DDRPHY_ACIOCR2_ACOECLKGATE0(x) (((uint32_t)(((uint32_t)(x)) << DDRPHY_ACIOCR2_ACO… macro
DMIMX8QX6_cm4.h18106 #define DDRPHY_ACIOCR2_ACOECLKGATE0(x) (((uint32_t)(((uint32_t)(x)) << DDRPHY_ACIOCR2_ACO… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/
DMIMX8DX6_cm4.h18106 #define DDRPHY_ACIOCR2_ACOECLKGATE0(x) (((uint32_t)(((uint32_t)(x)) << DDRPHY_ACIOCR2_ACO… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/
DMIMX8QX5_cm4.h18105 #define DDRPHY_ACIOCR2_ACOECLKGATE0(x) (((uint32_t)(((uint32_t)(x)) << DDRPHY_ACIOCR2_ACO… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/
DMIMX8DX5_cm4.h18106 #define DDRPHY_ACIOCR2_ACOECLKGATE0(x) (((uint32_t)(((uint32_t)(x)) << DDRPHY_ACIOCR2_ACO… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/
DMIMX8UX6_cm4.h18107 #define DDRPHY_ACIOCR2_ACOECLKGATE0(x) (((uint32_t)(((uint32_t)(x)) << DDRPHY_ACIOCR2_ACO… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/
DMIMX8UX5_cm4.h18107 #define DDRPHY_ACIOCR2_ACOECLKGATE0(x) (((uint32_t)(((uint32_t)(x)) << DDRPHY_ACIOCR2_ACO… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/
DMIMX8QX4_cm4.h18103 #define DDRPHY_ACIOCR2_ACOECLKGATE0(x) (((uint32_t)(((uint32_t)(x)) << DDRPHY_ACIOCR2_ACO… macro