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Searched refs:DDRC_TIMING_CFG_4_WWT_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_DDRC.h986 #define DDRC_TIMING_CFG_4_WWT_MASK (0xF0000U) macro
989 … (((uint32_t)(((uint32_t)(x)) << DDRC_TIMING_CFG_4_WWT_SHIFT)) & DDRC_TIMING_CFG_4_WWT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9131/
DMIMX9131.h13500 #define DDRC_TIMING_CFG_4_WWT_MASK (0xF0000U) macro
13503 … (((uint32_t)(((uint32_t)(x)) << DDRC_TIMING_CFG_4_WWT_SHIFT)) & DDRC_TIMING_CFG_4_WWT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9352/
DMIMX9352_cm33.h11773 #define DDRC_TIMING_CFG_4_WWT_MASK (0xF0000U) macro
11776 … (((uint32_t)(((uint32_t)(x)) << DDRC_TIMING_CFG_4_WWT_SHIFT)) & DDRC_TIMING_CFG_4_WWT_MASK)
DMIMX9352_ca55.h14678 #define DDRC_TIMING_CFG_4_WWT_MASK (0xF0000U) macro
14681 … (((uint32_t)(((uint32_t)(x)) << DDRC_TIMING_CFG_4_WWT_SHIFT)) & DDRC_TIMING_CFG_4_WWT_MASK)