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Searched refs:DDRC_STAT_SELFREF_STATE_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/imx/devices/MCIMX7D/
DMCIMX7D_M4.h10750 #define DDRC_STAT_SELFREF_STATE_MASK 0x300u macro
10752 … (((uint32_t)(((uint32_t)(x))<<DDRC_STAT_SELFREF_STATE_SHIFT))&DDRC_STAT_SELFREF_STATE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h13227 #define DDRC_STAT_SELFREF_STATE_MASK (0x300U) macro
13236 … (((uint32_t)(((uint32_t)(x)) << DDRC_STAT_SELFREF_STATE_SHIFT)) & DDRC_STAT_SELFREF_STATE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h13227 #define DDRC_STAT_SELFREF_STATE_MASK (0x300U) macro
13236 … (((uint32_t)(((uint32_t)(x)) << DDRC_STAT_SELFREF_STATE_SHIFT)) & DDRC_STAT_SELFREF_STATE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7.h13227 #define DDRC_STAT_SELFREF_STATE_MASK (0x300U) macro
13236 … (((uint32_t)(((uint32_t)(x)) << DDRC_STAT_SELFREF_STATE_SHIFT)) & DDRC_STAT_SELFREF_STATE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_dsp.h12871 #define DDRC_STAT_SELFREF_STATE_MASK (0x300U) macro
12880 … (((uint32_t)(((uint32_t)(x)) << DDRC_STAT_SELFREF_STATE_SHIFT)) & DDRC_STAT_SELFREF_STATE_MASK)
DMIMX8ML8_cm7.h13227 #define DDRC_STAT_SELFREF_STATE_MASK (0x300U) macro
13236 … (((uint32_t)(((uint32_t)(x)) << DDRC_STAT_SELFREF_STATE_SHIFT)) & DDRC_STAT_SELFREF_STATE_MASK)
DMIMX8ML8_ca53.h13254 #define DDRC_STAT_SELFREF_STATE_MASK (0x300U) macro
13263 … (((uint32_t)(((uint32_t)(x)) << DDRC_STAT_SELFREF_STATE_SHIFT)) & DDRC_STAT_SELFREF_STATE_MASK)