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Searched refs:DDRC_REMAP_3B_REG_3_SA_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_DDRC.h372 #define DDRC_REMAP_3B_REG_3_SA_MASK (0xFFF0000U) macro
375 … (((uint32_t)(((uint32_t)(x)) << DDRC_REMAP_3B_REG_3_SA_SHIFT)) & DDRC_REMAP_3B_REG_3_SA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9131/
DMIMX9131.h12766 #define DDRC_REMAP_3B_REG_3_SA_MASK (0xFFF0000U) macro
12769 … (((uint32_t)(((uint32_t)(x)) << DDRC_REMAP_3B_REG_3_SA_SHIFT)) & DDRC_REMAP_3B_REG_3_SA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9352/
DMIMX9352_cm33.h11031 #define DDRC_REMAP_3B_REG_3_SA_MASK (0xFFF0000U) macro
11034 … (((uint32_t)(((uint32_t)(x)) << DDRC_REMAP_3B_REG_3_SA_SHIFT)) & DDRC_REMAP_3B_REG_3_SA_MASK)
DMIMX9352_ca55.h13936 #define DDRC_REMAP_3B_REG_3_SA_MASK (0xFFF0000U) macro
13939 … (((uint32_t)(((uint32_t)(x)) << DDRC_REMAP_3B_REG_3_SA_SHIFT)) & DDRC_REMAP_3B_REG_3_SA_MASK)