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Searched refs:DDRC_PMLCB5_THRESHOLD_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_DDRC.h1773 #define DDRC_PMLCB5_THRESHOLD_MASK (0x3FU) macro
1776 … (((uint32_t)(((uint32_t)(x)) << DDRC_PMLCB5_THRESHOLD_SHIFT)) & DDRC_PMLCB5_THRESHOLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9131/
DMIMX9131.h14606 #define DDRC_PMLCB5_THRESHOLD_MASK (0x3FU) macro
14609 … (((uint32_t)(((uint32_t)(x)) << DDRC_PMLCB5_THRESHOLD_SHIFT)) & DDRC_PMLCB5_THRESHOLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9352/
DMIMX9352_cm33.h12882 #define DDRC_PMLCB5_THRESHOLD_MASK (0x3FU) macro
12885 … (((uint32_t)(((uint32_t)(x)) << DDRC_PMLCB5_THRESHOLD_SHIFT)) & DDRC_PMLCB5_THRESHOLD_MASK)
DMIMX9352_ca55.h15787 #define DDRC_PMLCB5_THRESHOLD_MASK (0x3FU) macro
15790 … (((uint32_t)(((uint32_t)(x)) << DDRC_PMLCB5_THRESHOLD_SHIFT)) & DDRC_PMLCB5_THRESHOLD_MASK)