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Searched refs:DDRC_INIT1_DRAM_RSTN_X1024_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/imx/devices/MCIMX7D/
DMCIMX7D_M4.h10860 #define DDRC_INIT1_DRAM_RSTN_X1024_MASK 0xFF0000u macro
10862 … (((uint32_t)(((uint32_t)(x))<<DDRC_INIT1_DRAM_RSTN_X1024_SHIFT))&DDRC_INIT1_DRAM_RSTN_X1024_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h13925 #define DDRC_INIT1_DRAM_RSTN_X1024_MASK (0x1FF0000U) macro
13933 …(uint32_t)(((uint32_t)(x)) << DDRC_INIT1_DRAM_RSTN_X1024_SHIFT)) & DDRC_INIT1_DRAM_RSTN_X1024_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h13925 #define DDRC_INIT1_DRAM_RSTN_X1024_MASK (0x1FF0000U) macro
13933 …(uint32_t)(((uint32_t)(x)) << DDRC_INIT1_DRAM_RSTN_X1024_SHIFT)) & DDRC_INIT1_DRAM_RSTN_X1024_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7.h13925 #define DDRC_INIT1_DRAM_RSTN_X1024_MASK (0x1FF0000U) macro
13933 …(uint32_t)(((uint32_t)(x)) << DDRC_INIT1_DRAM_RSTN_X1024_SHIFT)) & DDRC_INIT1_DRAM_RSTN_X1024_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_dsp.h13556 #define DDRC_INIT1_DRAM_RSTN_X1024_MASK (0x1FF0000U) macro
13564 …(uint32_t)(((uint32_t)(x)) << DDRC_INIT1_DRAM_RSTN_X1024_SHIFT)) & DDRC_INIT1_DRAM_RSTN_X1024_MASK)
DMIMX8ML8_cm7.h13925 #define DDRC_INIT1_DRAM_RSTN_X1024_MASK (0x1FF0000U) macro
13933 …(uint32_t)(((uint32_t)(x)) << DDRC_INIT1_DRAM_RSTN_X1024_SHIFT)) & DDRC_INIT1_DRAM_RSTN_X1024_MASK)
DMIMX8ML8_ca53.h13952 #define DDRC_INIT1_DRAM_RSTN_X1024_MASK (0x1FF0000U) macro
13960 …(uint32_t)(((uint32_t)(x)) << DDRC_INIT1_DRAM_RSTN_X1024_SHIFT)) & DDRC_INIT1_DRAM_RSTN_X1024_MASK)