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Searched refs:DDRC_ERR_DISABLE_PHYED_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_DDRC.h2510 #define DDRC_ERR_DISABLE_PHYED_MASK (0x10000U) macro
2513 … (((uint32_t)(((uint32_t)(x)) << DDRC_ERR_DISABLE_PHYED_SHIFT)) & DDRC_ERR_DISABLE_PHYED_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9131/
DMIMX9131.h15475 #define DDRC_ERR_DISABLE_PHYED_MASK (0x10000U) macro
15481 … (((uint32_t)(((uint32_t)(x)) << DDRC_ERR_DISABLE_PHYED_SHIFT)) & DDRC_ERR_DISABLE_PHYED_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9352/
DMIMX9352_cm33.h13751 #define DDRC_ERR_DISABLE_PHYED_MASK (0x10000U) macro
13757 … (((uint32_t)(((uint32_t)(x)) << DDRC_ERR_DISABLE_PHYED_SHIFT)) & DDRC_ERR_DISABLE_PHYED_MASK)
DMIMX9352_ca55.h16656 #define DDRC_ERR_DISABLE_PHYED_MASK (0x10000U) macro
16662 … (((uint32_t)(((uint32_t)(x)) << DDRC_ERR_DISABLE_PHYED_SHIFT)) & DDRC_ERR_DISABLE_PHYED_MASK)