Searched refs:DCDC_REG21_DIG_STBY_TRG_SP1_MASK (Results 1 – 12 of 12) sorted by relevance
26333 #define DCDC_REG21_DIG_STBY_TRG_SP1_MASK (0xFFFFFFFFU) macro26335 …int32_t)(((uint32_t)(x)) << DCDC_REG21_DIG_STBY_TRG_SP1_SHIFT)) & DCDC_REG21_DIG_STBY_TRG_SP1_MASK)
26336 #define DCDC_REG21_DIG_STBY_TRG_SP1_MASK (0xFFFFFFFFU) macro26338 …int32_t)(((uint32_t)(x)) << DCDC_REG21_DIG_STBY_TRG_SP1_SHIFT)) & DCDC_REG21_DIG_STBY_TRG_SP1_MASK)
26024 #define DCDC_REG21_DIG_STBY_TRG_SP1_MASK (0xFFFFFFFFU) macro26026 …int32_t)(((uint32_t)(x)) << DCDC_REG21_DIG_STBY_TRG_SP1_SHIFT)) & DCDC_REG21_DIG_STBY_TRG_SP1_MASK)
26021 #define DCDC_REG21_DIG_STBY_TRG_SP1_MASK (0xFFFFFFFFU) macro26023 …int32_t)(((uint32_t)(x)) << DCDC_REG21_DIG_STBY_TRG_SP1_SHIFT)) & DCDC_REG21_DIG_STBY_TRG_SP1_MASK)
28026 #define DCDC_REG21_DIG_STBY_TRG_SP1_MASK (0xFFFFFFFFU) macro28028 …int32_t)(((uint32_t)(x)) << DCDC_REG21_DIG_STBY_TRG_SP1_SHIFT)) & DCDC_REG21_DIG_STBY_TRG_SP1_MASK)
28029 #define DCDC_REG21_DIG_STBY_TRG_SP1_MASK (0xFFFFFFFFU) macro28031 …int32_t)(((uint32_t)(x)) << DCDC_REG21_DIG_STBY_TRG_SP1_SHIFT)) & DCDC_REG21_DIG_STBY_TRG_SP1_MASK)
28335 #define DCDC_REG21_DIG_STBY_TRG_SP1_MASK (0xFFFFFFFFU) macro28337 …int32_t)(((uint32_t)(x)) << DCDC_REG21_DIG_STBY_TRG_SP1_SHIFT)) & DCDC_REG21_DIG_STBY_TRG_SP1_MASK)
28338 #define DCDC_REG21_DIG_STBY_TRG_SP1_MASK (0xFFFFFFFFU) macro28340 …int32_t)(((uint32_t)(x)) << DCDC_REG21_DIG_STBY_TRG_SP1_SHIFT)) & DCDC_REG21_DIG_STBY_TRG_SP1_MASK)
28341 #define DCDC_REG21_DIG_STBY_TRG_SP1_MASK (0xFFFFFFFFU) macro28343 …int32_t)(((uint32_t)(x)) << DCDC_REG21_DIG_STBY_TRG_SP1_SHIFT)) & DCDC_REG21_DIG_STBY_TRG_SP1_MASK)
28343 #define DCDC_REG21_DIG_STBY_TRG_SP1_MASK (0xFFFFFFFFU) macro28345 …int32_t)(((uint32_t)(x)) << DCDC_REG21_DIG_STBY_TRG_SP1_SHIFT)) & DCDC_REG21_DIG_STBY_TRG_SP1_MASK)
28340 #define DCDC_REG21_DIG_STBY_TRG_SP1_MASK (0xFFFFFFFFU) macro28342 …int32_t)(((uint32_t)(x)) << DCDC_REG21_DIG_STBY_TRG_SP1_SHIFT)) & DCDC_REG21_DIG_STBY_TRG_SP1_MASK)
