Searched refs:DCDC_REG1_RLOAD_REG_EN_LPSR_MASK (Results 1 – 19 of 19) sorted by relevance
501 base->REG1 &= ~DCDC_REG1_RLOAD_REG_EN_LPSR_MASK; in DCDC_BootIntoDCM()
25675 #define DCDC_REG1_RLOAD_REG_EN_LPSR_MASK (0x10U) macro25681 …int32_t)(((uint32_t)(x)) << DCDC_REG1_RLOAD_REG_EN_LPSR_SHIFT)) & DCDC_REG1_RLOAD_REG_EN_LPSR_MASK)
25678 #define DCDC_REG1_RLOAD_REG_EN_LPSR_MASK (0x10U) macro25684 …int32_t)(((uint32_t)(x)) << DCDC_REG1_RLOAD_REG_EN_LPSR_SHIFT)) & DCDC_REG1_RLOAD_REG_EN_LPSR_MASK)
25990 #define DCDC_REG1_RLOAD_REG_EN_LPSR_MASK (0x10U) macro25996 …int32_t)(((uint32_t)(x)) << DCDC_REG1_RLOAD_REG_EN_LPSR_SHIFT)) & DCDC_REG1_RLOAD_REG_EN_LPSR_MASK)
25987 #define DCDC_REG1_RLOAD_REG_EN_LPSR_MASK (0x10U) macro25993 …int32_t)(((uint32_t)(x)) << DCDC_REG1_RLOAD_REG_EN_LPSR_SHIFT)) & DCDC_REG1_RLOAD_REG_EN_LPSR_MASK)
27992 #define DCDC_REG1_RLOAD_REG_EN_LPSR_MASK (0x10U) macro27998 …int32_t)(((uint32_t)(x)) << DCDC_REG1_RLOAD_REG_EN_LPSR_SHIFT)) & DCDC_REG1_RLOAD_REG_EN_LPSR_MASK)
27989 #define DCDC_REG1_RLOAD_REG_EN_LPSR_MASK (0x10U) macro27995 …int32_t)(((uint32_t)(x)) << DCDC_REG1_RLOAD_REG_EN_LPSR_SHIFT)) & DCDC_REG1_RLOAD_REG_EN_LPSR_MASK)
27683 #define DCDC_REG1_RLOAD_REG_EN_LPSR_MASK (0x10U) macro27689 …int32_t)(((uint32_t)(x)) << DCDC_REG1_RLOAD_REG_EN_LPSR_SHIFT)) & DCDC_REG1_RLOAD_REG_EN_LPSR_MASK)
27680 #define DCDC_REG1_RLOAD_REG_EN_LPSR_MASK (0x10U) macro27686 …int32_t)(((uint32_t)(x)) << DCDC_REG1_RLOAD_REG_EN_LPSR_SHIFT)) & DCDC_REG1_RLOAD_REG_EN_LPSR_MASK)
27995 #define DCDC_REG1_RLOAD_REG_EN_LPSR_MASK (0x10U) macro28001 …int32_t)(((uint32_t)(x)) << DCDC_REG1_RLOAD_REG_EN_LPSR_SHIFT)) & DCDC_REG1_RLOAD_REG_EN_LPSR_MASK)
27997 #define DCDC_REG1_RLOAD_REG_EN_LPSR_MASK (0x10U) macro28003 …int32_t)(((uint32_t)(x)) << DCDC_REG1_RLOAD_REG_EN_LPSR_SHIFT)) & DCDC_REG1_RLOAD_REG_EN_LPSR_MASK)
27994 #define DCDC_REG1_RLOAD_REG_EN_LPSR_MASK (0x10U) macro28000 …int32_t)(((uint32_t)(x)) << DCDC_REG1_RLOAD_REG_EN_LPSR_SHIFT)) & DCDC_REG1_RLOAD_REG_EN_LPSR_MASK)
