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Searched refs:DCDC_REG1_LP_CMP_ISRC_SEL (Results 1 – 25 of 31) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/dcdc_1/
Dfsl_dcdc.h516 base->REG1 |= DCDC_REG1_LP_CMP_ISRC_SEL(biasVaule); in DCDC_SetLPComparatorBiasValue()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_dcdc.h876 base->REG1 |= DCDC_REG1_LP_CMP_ISRC_SEL(biasValue); in DCDC_SetLPComparatorBiasValue()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_dcdc.h876 base->REG1 |= DCDC_REG1_LP_CMP_ISRC_SEL(biasValue); in DCDC_SetLPComparatorBiasValue()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_dcdc.h876 base->REG1 |= DCDC_REG1_LP_CMP_ISRC_SEL(biasValue); in DCDC_SetLPComparatorBiasValue()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_dcdc.h876 base->REG1 |= DCDC_REG1_LP_CMP_ISRC_SEL(biasValue); in DCDC_SetLPComparatorBiasValue()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_dcdc.h876 base->REG1 |= DCDC_REG1_LP_CMP_ISRC_SEL(biasValue); in DCDC_SetLPComparatorBiasValue()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_dcdc.h876 base->REG1 |= DCDC_REG1_LP_CMP_ISRC_SEL(biasValue); in DCDC_SetLPComparatorBiasValue()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_dcdc.h876 base->REG1 |= DCDC_REG1_LP_CMP_ISRC_SEL(biasValue); in DCDC_SetLPComparatorBiasValue()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h8102 #define DCDC_REG1_LP_CMP_ISRC_SEL(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_I… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h8816 #define DCDC_REG1_LP_CMP_ISRC_SEL(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_I… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h10356 #define DCDC_REG1_LP_CMP_ISRC_SEL(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_I… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h10376 #define DCDC_REG1_LP_CMP_ISRC_SEL(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_I… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h11398 #define DCDC_REG1_LP_CMP_ISRC_SEL(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_I… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h12469 #define DCDC_REG1_LP_CMP_ISRC_SEL(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_I… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h12183 #define DCDC_REG1_LP_CMP_ISRC_SEL(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_I… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h12471 #define DCDC_REG1_LP_CMP_ISRC_SEL(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_I… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h12837 #define DCDC_REG1_LP_CMP_ISRC_SEL(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_I… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h13701 #define DCDC_REG1_LP_CMP_ISRC_SEL(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_I… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h13623 #define DCDC_REG1_LP_CMP_ISRC_SEL(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_I… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h26012 #define DCDC_REG1_LP_CMP_ISRC_SEL(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_I… macro
DMIMXRT1175_cm7.h26015 #define DCDC_REG1_LP_CMP_ISRC_SEL(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_I… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h25703 #define DCDC_REG1_LP_CMP_ISRC_SEL(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_I… macro
DMIMXRT1165_cm4.h25700 #define DCDC_REG1_LP_CMP_ISRC_SEL(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_I… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h26015 #define DCDC_REG1_LP_CMP_ISRC_SEL(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_I… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h27705 #define DCDC_REG1_LP_CMP_ISRC_SEL(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG1_LP_CMP_I… macro

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