Searched refs:DCDC_REG13_DIG_TRG_SP1_MASK (Results 1 – 12 of 12) sorted by relevance
26269 #define DCDC_REG13_DIG_TRG_SP1_MASK (0xFFFFFFFFU) macro26271 … (((uint32_t)(((uint32_t)(x)) << DCDC_REG13_DIG_TRG_SP1_SHIFT)) & DCDC_REG13_DIG_TRG_SP1_MASK)
26272 #define DCDC_REG13_DIG_TRG_SP1_MASK (0xFFFFFFFFU) macro26274 … (((uint32_t)(((uint32_t)(x)) << DCDC_REG13_DIG_TRG_SP1_SHIFT)) & DCDC_REG13_DIG_TRG_SP1_MASK)
25960 #define DCDC_REG13_DIG_TRG_SP1_MASK (0xFFFFFFFFU) macro25962 … (((uint32_t)(((uint32_t)(x)) << DCDC_REG13_DIG_TRG_SP1_SHIFT)) & DCDC_REG13_DIG_TRG_SP1_MASK)
25957 #define DCDC_REG13_DIG_TRG_SP1_MASK (0xFFFFFFFFU) macro25959 … (((uint32_t)(((uint32_t)(x)) << DCDC_REG13_DIG_TRG_SP1_SHIFT)) & DCDC_REG13_DIG_TRG_SP1_MASK)
27962 #define DCDC_REG13_DIG_TRG_SP1_MASK (0xFFFFFFFFU) macro27964 … (((uint32_t)(((uint32_t)(x)) << DCDC_REG13_DIG_TRG_SP1_SHIFT)) & DCDC_REG13_DIG_TRG_SP1_MASK)
27965 #define DCDC_REG13_DIG_TRG_SP1_MASK (0xFFFFFFFFU) macro27967 … (((uint32_t)(((uint32_t)(x)) << DCDC_REG13_DIG_TRG_SP1_SHIFT)) & DCDC_REG13_DIG_TRG_SP1_MASK)
28271 #define DCDC_REG13_DIG_TRG_SP1_MASK (0xFFFFFFFFU) macro28273 … (((uint32_t)(((uint32_t)(x)) << DCDC_REG13_DIG_TRG_SP1_SHIFT)) & DCDC_REG13_DIG_TRG_SP1_MASK)
28274 #define DCDC_REG13_DIG_TRG_SP1_MASK (0xFFFFFFFFU) macro28276 … (((uint32_t)(((uint32_t)(x)) << DCDC_REG13_DIG_TRG_SP1_SHIFT)) & DCDC_REG13_DIG_TRG_SP1_MASK)
28277 #define DCDC_REG13_DIG_TRG_SP1_MASK (0xFFFFFFFFU) macro28279 … (((uint32_t)(((uint32_t)(x)) << DCDC_REG13_DIG_TRG_SP1_SHIFT)) & DCDC_REG13_DIG_TRG_SP1_MASK)
28279 #define DCDC_REG13_DIG_TRG_SP1_MASK (0xFFFFFFFFU) macro28281 … (((uint32_t)(((uint32_t)(x)) << DCDC_REG13_DIG_TRG_SP1_SHIFT)) & DCDC_REG13_DIG_TRG_SP1_MASK)
28276 #define DCDC_REG13_DIG_TRG_SP1_MASK (0xFFFFFFFFU) macro28278 … (((uint32_t)(((uint32_t)(x)) << DCDC_REG13_DIG_TRG_SP1_SHIFT)) & DCDC_REG13_DIG_TRG_SP1_MASK)
