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Searched refs:DBG_RAM_CTRL (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h46197 __IO uint32_t DBG_RAM_CTRL; /**< DBG Ram control register, offset: 0x10 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h48366 __IO uint32_t DBG_RAM_CTRL; /**< DBG Ram control register, offset: 0x10 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h53945 __IO uint32_t DBG_RAM_CTRL; /**< DBG Ram control register, offset: 0x10 */ member
DMCXW727C_cm33_core1.h59733 __IO uint32_t DBG_RAM_CTRL; /**< DBG Ram control register, offset: 0x10 */ member