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/hal_nxp-latest/mcux/mcux-sdk/drivers/i2c/
Dfsl_i2c.c227 (void)base->D; in I2C_MasterAckByte()
395 … base->D = (uint8_t)((handle->transfer.subaddress) >> (8U * handle->transfer.subaddressSize)); in I2C_MasterTransferRunStateMachine()
406 base->D = *handle->transfer.data; in I2C_MasterTransferRunStateMachine()
431 base->D = *handle->transfer.data; in I2C_MasterTransferRunStateMachine()
451 (void)base->D; in I2C_MasterTransferRunStateMachine()
487 tmpdata = base->D; in I2C_MasterTransferRunStateMachine()
864 base->D = (uint8_t)(((uint32_t)address) << 1U | ((direction == kI2C_Read) ? 1U : 0U)); in I2C_MasterStart()
926 base->D = (uint8_t)(((uint32_t)address) << 1U | ((direction == kI2C_Read) ? 1U : 0U)); in I2C_MasterRepeatedStart()
1040 base->D = *txBuff++; in I2C_MasterWriteBlocking()
1145 (void)base->D; in I2C_MasterReadBlocking()
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Dfsl_i2c_dma.c115 tmpdata = i2cPrivateHandle->base->D; in I2C_MasterTransferCallbackDMA()
145 tmpdata = i2cPrivateHandle->base->D; in I2C_MasterTransferCallbackDMA()
282 … base->D = (uint8_t)((handle->transfer.subaddress) >> (8U * handle->transfer.subaddressSize)); in I2C_InitTransferStateMachineDMA()
479 (void)base->D; in I2C_MasterTransferDMA()
490 base->D = *handle->transfer.data; in I2C_MasterTransferDMA()
508 (void)base->D; in I2C_MasterTransferDMA()
512 base->D = *handle->transfer.data; in I2C_MasterTransferDMA()
548 tmpdata = base->D; in I2C_MasterTransferDMA()
Dfsl_i2c_edma.c115 … tmpReg = i2cPrivateHandle->base->D; in I2C_MasterTransferCallbackEDMA()
146 … tmpReg = i2cPrivateHandle->base->D; in I2C_MasterTransferCallbackEDMA()
283 … base->D = (uint8_t)((handle->transfer.subaddress) >> (8U * handle->transfer.subaddressSize)); in I2C_InitTransferStateMachineEDMA()
486 (void)base->D; in I2C_MasterTransferEDMA()
497 base->D = *handle->transfer.data; in I2C_MasterTransferEDMA()
515 (void)base->D; in I2C_MasterTransferEDMA()
519 base->D = *handle->transfer.data; in I2C_MasterTransferEDMA()
556 tmpReg = base->D; in I2C_MasterTransferEDMA()
Dfsl_i2c.h542 return (uint32_t)(&(base->D)); in I2C_GetDataRegAddr()
/hal_nxp-latest/mcux/mcux-sdk/drivers/uart/
Dfsl_uart.c718 (void)base->D; in UART_ClearStatusFlags()
777 base->D = *(data++); in UART_WriteBlocking()
808 base->D = data[i]; in UART_WriteNonBlocking()
895 *(data++) = base->D; in UART_ReadBlocking()
916 data[i] = base->D; in UART_ReadNonBlocking()
1493 (void)base->D; in UART_TransferHandleIRQ()
1515 (void)base->D; in UART_TransferHandleIRQ()
1537 (void)base->D; in UART_TransferHandleIRQ()
1595 (void)base->D; in UART_TransferHandleIRQ()
1682 tmpdata = base->D; in UART_TransferHandleIRQ()
Dfsl_uart.h533 return (uint32_t) & (base->D); in UART_GetDataRegisterAddress()
655 base->D = data; in UART_WriteByte()
669 return base->D; in UART_ReadByte()
/hal_nxp-latest/mcux/mcux-sdk/drivers/lpsci/
Dfsl_lpsci.c195 data[i] = base->D; in LPSCI_ReadNonBlocking()
209 base->D = data[i]; in LPSCI_WriteNonBlocking()
530 base->D = *(data++); in LPSCI_WriteBlocking()
570 *(data++) = base->D; in LPSCI_ReadBlocking()
901 (void)base->D; in LPSCI_TransferHandleIRQ()
978 handle->rxRingBuffer[handle->rxRingBufferHead] = base->D; in LPSCI_TransferHandleIRQ()
Dfsl_lpsci.h398 return (uint32_t) & (base->D); in LPSCI_GetDataRegisterAddress()
504 base->D = data; in LPSCI_WriteByte()
518 return base->D; in LPSCI_ReadByte()
/hal_nxp-latest/mcux/mcux-sdk/drivers/spi/
Dfsl_spi.c172 base->D = *buffer++; in SPI_WriteNonBlocking()
182 base->D = g_spiDummyData[instance] & 0xFFU; in SPI_WriteNonBlocking()
211 *buffer++ = base->D; in SPI_ReadNonBlocking()
883 base->D = (uint8_t)data & 0xFFU; in SPI_WriteData()
900 val = base->D; in SPI_ReadData()
Dfsl_spi.h458 return (uint32_t)(&(base->D)); in SPI_GetDataRegisterAddress()
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/DSP/Include/
Darm_vec_math_f16.h138 float16x8_t D = vfmasq(vdupq_n_f16(coeffs[7]), x, coeffs[3]); in vtaylor_polyq_f16() local
141 float16x8_t res = vfmaq(vfmaq_f16(A, B, x2), vfmaq_f16(C, D, x2), x4); in vtaylor_polyq_f16()
Darm_vec_math.h135 f32x4_t D = vfmasq(vdupq_n_f32(coeffs[7]), x, coeffs[3]); in vtaylor_polyq_f32() local
138 f32x4_t res = vfmaq(vfmaq_f32(A, B, x2), vfmaq_f32(C, D, x2), x4); in vtaylor_polyq_f32()
/hal_nxp-latest/mcux/mcux-sdk/middleware/mmcau/asm-cm4-cm7/src/
Dmmcau_md5_functions.s9 # DEPARTMENT : MSG R&D Core and Platforms
Dmmcau_sha1_functions.s9 # DEPARTMENT : MSG R&D Core and Platforms
Dmmcau_sha256_functions.s9 # DEPARTMENT : MSG R&D Core and Platforms
Dmmcau_des_functions.s9 # DEPARTMENT : MSG R&D Core and Platforms
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/gcc/
DMIMX8UD7xxxxx_cm33_flash.ld8 ** Reference manual: IMX8ULPRM, Rev. D, December. 2022
203 . = ALIGN(16); /* the cache line size of D-Cache of Cortex-M33 is 16 bytes */
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/gcc/
DMIMX8UD5xxxxx_cm33_flash.ld8 ** Reference manual: IMX8ULPRM, Rev. D, December. 2022
203 . = ALIGN(16); /* the cache line size of D-Cache of Cortex-M33 is 16 bytes */
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/gcc/
DMIMX8US5xxxxx_cm33_flash.ld8 ** Reference manual: IMX8ULPRM, Rev. D, December. 2022
203 . = ALIGN(16); /* the cache line size of D-Cache of Cortex-M33 is 16 bytes */
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/gcc/
DMIMX8US3xxxxx_cm33_flash.ld8 ** Reference manual: IMX8ULPRM, Rev. D, December. 2022
203 . = ALIGN(16); /* the cache line size of D-Cache of Cortex-M33 is 16 bytes */
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/gcc/
DMIMX8UD3xxxxx_cm33_flash.ld8 ** Reference manual: IMX8ULPRM, Rev. D, December. 2022
203 . = ALIGN(16); /* the cache line size of D-Cache of Cortex-M33 is 16 bytes */
/hal_nxp-latest/mcux/mcux-sdk/middleware/mmcau/asm-cm0p/src/
Dmmcau_des_functions.s8 # DEPARTMENT : MCG R&D Cores and Platforms
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/gcc/
DMIMX8ML3xxxxx_cm7_ddr_ram.ld7 ** Reference manual: IMX8MPRM, Rev.D, 12/2020
DMIMX8ML3xxxxx_cm7_flash.ld7 ** Reference manual: IMX8MPRM, Rev.D, 12/2020
DMIMX8ML3xxxxx_cm7_ram.ld7 ** Reference manual: IMX8MPRM, Rev.D, 12/2020

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